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    Subject[PATCH AUTOSEL 5.4 050/459] arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
    Date
    From: Baruch Siach <baruch@tkos.co.il>

    [ Upstream commit 62bba54d99407aedfe9b0a02e72e23c06e2b0116 ]

    Explicitly set the switch cpu (upstream) port phy-mode and managed
    properties. This fixes the Marvell 88E6141 switch serdes configuration
    with the recently enabled phylink layer.

    Fixes: a6120833272c ("arm64: dts: add support for SolidRun Clearfog GT 8K")
    Reported-by: Denis Odintsov <d.odintsov@traviangames.com>
    Signed-off-by: Baruch Siach <baruch@tkos.co.il>
    Reviewed-by: Andrew Lunn <andrew@lunn.ch>
    Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 ++
    1 file changed, 2 insertions(+)

    diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
    index bd881497b8729..a211a046b2f2f 100644
    --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
    +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
    @@ -408,6 +408,8 @@
    reg = <5>;
    label = "cpu";
    ethernet = <&cp1_eth2>;
    + phy-mode = "2500base-x";
    + managed = "in-band-status";
    };
    };

    --
    2.20.1
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