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SubjectRe: [PATCH v3 3/4] phy: qcom-qmp: Add QMP V3 USB3 PHY support for SC7180
On Wed, Feb 12, 2020 at 04:51:27PM +0530, Sandeep Maheswaram wrote:
> Adding QMP v3 USB3 phy support for SC7180.
> Adding only usb phy reset in the list to avoid
> reset of DP block.
>
> Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp.c | 38 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
> index 7db2a94..dc300a9 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
> @@ -1139,6 +1139,10 @@ static const char * const msm8996_usb3phy_reset_l[] = {
> "phy", "common",
> };
>
> +static const char * const sc7180_usb3phy_reset_l[] = {
> + "phy",
> +};
> +
> /* list of regulators */
> static const char * const qmp_phy_vreg_l[] = {
> "vdda-phy", "vdda-pll",
> @@ -1265,6 +1269,37 @@ static const struct qmp_phy_cfg qmp_v3_usb3phy_cfg = {
> .is_dual_lane_phy = true,
> };
>
> +static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
> + .type = PHY_TYPE_USB3,
> + .nlanes = 1,
> +
> + .serdes_tbl = qmp_v3_usb3_serdes_tbl,
> + .serdes_tbl_num = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
> + .tx_tbl = qmp_v3_usb3_tx_tbl,
> + .tx_tbl_num = ARRAY_SIZE(qmp_v3_usb3_tx_tbl),
> + .rx_tbl = qmp_v3_usb3_rx_tbl,
> + .rx_tbl_num = ARRAY_SIZE(qmp_v3_usb3_rx_tbl),
> + .pcs_tbl = qmp_v3_usb3_pcs_tbl,
> + .pcs_tbl_num = ARRAY_SIZE(qmp_v3_usb3_pcs_tbl),
> + .clk_list = qmp_v3_phy_clk_l,
> + .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l),
> + .reset_list = sc7180_usb3phy_reset_l,
> + .num_resets = ARRAY_SIZE(sc7180_usb3phy_reset_l),
> + .vreg_list = qmp_phy_vreg_l,
> + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
> + .regs = qmp_v3_usb3phy_regs_layout,
> +
> + .start_ctrl = SERDES_START | PCS_START,
> + .pwrdn_ctrl = SW_PWRDN,
> +
> + .has_pwrdn_delay = true,
> + .pwrdn_delay_min = POWER_DOWN_DELAY_US_MIN,
> + .pwrdn_delay_max = POWER_DOWN_DELAY_US_MAX,
> +
> + .has_phy_dp_com_ctrl = true,
> + .is_dual_lane_phy = true,
> +};
> +
> static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
> .type = PHY_TYPE_USB3,
> .nlanes = 1,
> @@ -2103,6 +2138,9 @@ static const struct of_device_id qcom_qmp_phy_of_match_table[] = {
> .compatible = "qcom,ipq8074-qmp-pcie-phy",
> .data = &ipq8074_pciephy_cfg,
> }, {
> + .compatible = "qcom,sc7180-qmp-usb3-phy",
> + .data = &sc7180_usb3phy_cfg,
> + }, {
> .compatible = "qcom,sdm845-qmp-usb3-phy",
> .data = &qmp_v3_usb3phy_cfg,
> }, {

I don't claim to be really knowledgable about this driver, but I confirmed
that this matches qmp_v3_usb3phy_cfg, except for the resets, since we don't
want to reset DP from the USB driver.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>

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