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SubjectRe: [PATCH v3 2/5] dt: bindings: add mt7621-clk device tree binding documentation
On Fri, Nov 13, 2020 at 04:46:29PM +0100, Sergio Paracuellos wrote:
> Adds device tree binding documentation for clocks in the
> MT7621 SOC.
>
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
> ---
> .../bindings/clock/mediatek,mt7621-clk.yaml | 61 +++++++++++++++++++
> 1 file changed, 61 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> new file mode 100644
> index 000000000000..363bd9880e29
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt7621-clk.yaml
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/mediatek,mt7621-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MT7621 Clock Device Tree Bindings
> +
> +maintainers:
> + - Sergio Paracuellos <sergio.paracuellos@gmail.com>
> +
> +description: |
> + The MT7621 has a PLL controller from where the cpu clock is provided
> + as well as derived clocks for the bus and the peripherals. It also
> + can gate SoC device clocks.
> +
> + Each clock is assigned an identifier and client nodes use this identifier
> + to specify the clock which they consume.
> +
> + All these identifiers could be found in:
> + [1]: <include/dt-bindings/clock/mt7621-clk.h>.
> +
> +properties:
> + compatible:
> + const: mediatek,mt7621-clk
> +
> + ralink,sysctl:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + phandle to the syscon which is in the same address area with syscon
> + device.
> +
> + "#clock-cells":
> + description:
> + The first cell indicates the clock gate number, see [1] for available
> + clocks.
> + const: 1
> +
> + clock-output-names:
> + maxItems: 8
> +
> +required:
> + - compatible
> + - ralink,sysctl
> + - '#clock-cells'
> + - clock-output-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt7621-clk.h>
> +
> + pll {
> + compatible = "mediatek,mt7621-clk";
> + ralink,sysctl = <&sysc>;

If this is the only control interface, then make this a child of 'sysc'.
And use 'reg' if there's a dedicated range of registers.

> + #clock-cells = <1>;
> + clock-output-names = "xtal", "cpu", "bus",
> + "50m", "125m", "150m",
> + "250m", "270m";
> + };
> --
> 2.25.1
>

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