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SubjectRe: [PATCH v5 0/4] MT7621 PCIe PHY
On 20-11-20, 17:20, Sergio Paracuellos wrote:
> Hi Vinod,
>
> On Thu, Nov 19, 2020 at 4:43 PM Sergio Paracuellos
> <sergio.paracuellos@gmail.com> wrote:
> >
> > This series adds support for the PCIe PHY found in the Mediatek
> > MT7621 SoC.
> >
> > There is also a 'mt7621-pci' driver which is the controller part
> > which is still in staging and is a client of this phy.
> >
> > Both drivers have been tested together in a gnubee1 board.
> >
> > This series are rebased on the top of linux-next:
> > commit 4e78c578cb98 ("Add linux-next specific files for 20201030")
> >
> > Changes in v5:
> > - PATCH 1/4: Recollect Rob's Reviewed-by of bindings.
> > - PATCH 4/4: Recollect Greg's Acked-by for removing stuff from
> > staging area.
> > - Make Vinod's review comments changes in [0]:
> > * Use FIELD_GET and FIELD_PREP apis and avoid multiple *_VAL and
> > *_SHIFT custom definitions.
> > * Remove phy-read and phy-write internal functions and directly
> > call regmap_read and regmap_write in 'mt7621_phy_rmw'.
> > * Change some traces from info to debug log level.
> > * Note that I have maintained 'mt7621_phy_rmw' instead of use
> > 'regmap_update_bits'. This is because in order to get a reliable
> > boot registers must be written event the contained value in
> > that register is the same. I have preferred doing in this way
> > instead of using 'regmap_update_bits_base' passing 'false' for
> > async and 'true' for the force write. If this way of using
> > 'regmap_update_bits_base' is preferred just let me know.
>
> I notice we already have 'regmap_write_bits' function. I will use this
> and avoid mt7621_phy_rmw
> and send v6 of this series.
>
> Also, do you have any preference of where you want this series to be rebased on?

Phy-next please

--
~Vinod

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