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Subject[PATCH RFC v1 0/4] dwmac-meson8b: picosecond precision RX delay support

with the help of Jianxin Pan (many thanks!) the meaning of the "new"
PRG_ETH1[19:16] register bits on Amlogic Meson G12A, G12B and SM1 SoCs
are finally known. These SoCs allow fine-tuning the RGMII RX delay in
200ps steps (contrary to what I have thought in the past [0] these are
not some "calibration" values).

The vendor u-boot has code to automatically detect the best RX/TX delay
settings. For now we keep it simple and add a device-tree property with
200ps precision to select the "right" RX delay for each board.

While here, deprecate the "amlogic,rx-delay-ns" property as it's not
used on any upstream .dts (yet). The driver is backwards compatible.

I have tested this on an X96 Air 4GB board (not upstream yet). Testing
with iperf3 gives 938 Mbits/sec in both directions (RX and TX). The
following network settings were used in the .dts (2ns TX delay
generated by the PHY, 800ps RX delay generated by the MAC as the PHY
only supports 0ns or 2ns RX delays):
&ext_mdio {
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;

reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW |

interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_14 */
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;

&ethmac {
status = "okay";

pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
pinctrl-names = "default";

phy-mode = "rgmii-txid";
phy-handle = <&external_phy>;

amlogic,rgmii-rx-delay-ps = <800>;


Martin Blumenstingl (4):
dt-bindings: net: dwmac-meson: use picoseconds for the RGMII RX delay
net: stmmac: dwmac-meson8b: use picoseconds for the RGMII RX delay
net: stmmac: dwmac-meson8b: move RGMII delays into a separate function
net: stmmac: dwmac-meson8b: add support for the RGMII RX delay on G12A

.../bindings/net/amlogic,meson-dwmac.yaml | 52 ++++++++++-
.../ethernet/stmicro/stmmac/dwmac-meson8b.c | 92 +++++++++++++++----
2 files changed, 123 insertions(+), 21 deletions(-)


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