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SubjectRe: [PATCH 0/3] x86: Add initial support to discover Intel hybrid CPUs
On Sat, Oct 03, 2020 at 12:46:29PM +0200, Thomas Gleixner wrote:
> > There might be some model specific performance counter events that only
> > apply to some cores. Or a machine check error code that is logged in the
> > model specific MSCOD field of IA32_MCi_STATUS. But any and all code can run
> > on any core.
> Ok. The perf side should be doable, IIRC we already have something like
> that, but Peter should know better.

Yes, ARM big.LITTLE has horrible hacks. Please look at them for

Also, I once started (and never found time to finish)..

Kan should be aware of all this.

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