lkml.org 
[lkml]   [2020]   [Oct]   [14]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH v3 5/5] arm64: dts: r8a77965: Add DRIF support
Hi Fabrizio,

Thank you for the patch.

On Tue, Oct 13, 2020 at 6:25 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
>
> Add the DRIF controller nodes for r8a77965 (a.k.a. R-Car M3-N).
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> ---
> v2->v3:
> * New patch
>
> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 120 ++++++++++++++++++++++
> 1 file changed, 120 insertions(+)
>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Cheers,
Prabhakar

> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> index fe4dc12e2bdf..c5a54dc7ede2 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
> @@ -1550,6 +1550,126 @@ vin7csi40: endpoint@2 {
> };
> };
>
> + drif00: rif@e6f40000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6f40000 0 0x84>;
> + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 515>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x20>, <&dmac2 0x20>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 515>;
> + renesas,bonding = <&drif01>;
> + status = "disabled";
> + };
> +
> + drif01: rif@e6f50000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6f50000 0 0x84>;
> + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 514>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x22>, <&dmac2 0x22>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 514>;
> + renesas,bonding = <&drif00>;
> + status = "disabled";
> + };
> +
> + drif10: rif@e6f60000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6f60000 0 0x84>;
> + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 513>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x24>, <&dmac2 0x24>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 513>;
> + renesas,bonding = <&drif11>;
> + status = "disabled";
> + };
> +
> + drif11: rif@e6f70000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6f70000 0 0x84>;
> + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 512>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x26>, <&dmac2 0x26>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 512>;
> + renesas,bonding = <&drif10>;
> + status = "disabled";
> + };
> +
> + drif20: rif@e6f80000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6f80000 0 0x84>;
> + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 511>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x28>, <&dmac2 0x28>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 511>;
> + renesas,bonding = <&drif21>;
> + status = "disabled";
> + };
> +
> + drif21: rif@e6f90000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6f90000 0 0x84>;
> + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 510>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 510>;
> + renesas,bonding = <&drif20>;
> + status = "disabled";
> + };
> +
> + drif30: rif@e6fa0000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6fa0000 0 0x84>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 509>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 509>;
> + renesas,bonding = <&drif31>;
> + status = "disabled";
> + };
> +
> + drif31: rif@e6fb0000 {
> + compatible = "renesas,r8a77965-drif",
> + "renesas,rcar-gen3-drif";
> + reg = <0 0xe6fb0000 0 0x84>;
> + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 508>;
> + clock-names = "fck";
> + dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
> + dma-names = "rx", "rx";
> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
> + resets = <&cpg 508>;
> + renesas,bonding = <&drif30>;
> + status = "disabled";
> + };
> +
> rcar_sound: sound@ec500000 {
> /*
> * #sound-dai-cells is required
> --
> 2.25.1
>

\
 
 \ /
  Last update: 2020-10-14 11:24    [W:0.149 / U:0.300 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site