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SubjectRe: [PATCH V9 1/4] perf/core: Add PERF_SAMPLE_DATA_PAGE_SIZE

On 10/12/2020 4:48 AM, Will Deacon wrote:
> On Sat, Oct 10, 2020 at 12:28:39AM +1100, Michael Ellerman wrote:
>> Peter Zijlstra <> writes:
>>> Patch 4 makes it all far worse by exposing it to pretty much everybody.
>>> Now, I think we can fix at least the user mappings with the below delta,
>>> but if archs are using non-page-table MMU sizes we'll need arch helpers.
>>> ARM64 is in that last boat.
>> I think we probably need it to be weak so we can provide our own
>> version.
> I guess the same thing applies to us, but I can't really tell how accurate
> this stuff needs to be for userspace. If it's trying to use the page-table
> configuration to infer properties of the TLB, that's never going to be
> reliable because the TLB can choose both to split and coalesce entries
> as long as software can't tell.

Hi Peter,

It looks like everybody wants a __weak function. If so, I guess we
should drop the generic code in this patch. For X86, we have existing
functions to retrieve the page level and the page size. I think we don't
need the generic code either.

Should I send a V10 patch to drop the generic code and implement an X86
specific perf_get_page_size()? Will, Michael, and others can implement
their version later separately.


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