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SubjectRe: [PATCH 1/2] clk: qoriq: modify MAX_PLL_DIV to 32
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Quoting Qiang Zhao (2020-09-15 20:03:10)
> From: Zhao Qiang <qiang.zhao@nxp.com>
>
> On LS2088A, Watchdog need clk divided by 32,
> so modify MAX_PLL_DIV to 32
>
> Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
> ---

Applied to clk-next

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