Messages in this thread Patch in this message |  | | From | Sowjanya Komatineni <> | Subject | [PATCH v6 01/19] dt-bindings: clock: tegra: Change CLK_M_DIV to OSC_DIV clocks | Date | Mon, 6 Jan 2020 20:14:00 -0800 |
| |
Tegra has no CLK_M_DIV2 and CLK_M_DIV4 clocks and instead it has OSC_DIV2 and OSC_DIV4 clocks from OSC pads.
This patch changes CLK_M_DIV2 and CLK_M_DIV4 clock ids to OSC_DIV2 and OSC_DIV4 clock ids for Tegra30 through Tegra210.
Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- include/dt-bindings/clock/tegra114-car.h | 4 ++-- include/dt-bindings/clock/tegra124-car-common.h | 4 ++-- include/dt-bindings/clock/tegra210-car.h | 4 ++-- include/dt-bindings/clock/tegra30-car.h | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h index bb5c2c999c05..f4880959b094 100644 --- a/include/dt-bindings/clock/tegra114-car.h +++ b/include/dt-bindings/clock/tegra114-car.h @@ -226,8 +226,8 @@ #define TEGRA114_CLK_FUSE_BURN 199 #define TEGRA114_CLK_CLK_32K 200 #define TEGRA114_CLK_CLK_M 201 -#define TEGRA114_CLK_CLK_M_DIV2 202 -#define TEGRA114_CLK_CLK_M_DIV4 203 +#define TEGRA114_CLK_OSC_DIV2 202 +#define TEGRA114_CLK_OSC_DIV4 203 #define TEGRA114_CLK_PLL_REF 204 #define TEGRA114_CLK_PLL_C 205 #define TEGRA114_CLK_PLL_C_OUT1 206 diff --git a/include/dt-bindings/clock/tegra124-car-common.h b/include/dt-bindings/clock/tegra124-car-common.h index 0c4f5be0a742..e7e601a88d3d 100644 --- a/include/dt-bindings/clock/tegra124-car-common.h +++ b/include/dt-bindings/clock/tegra124-car-common.h @@ -225,8 +225,8 @@ #define TEGRA124_CLK_FUSE_BURN 199 #define TEGRA124_CLK_CLK_32K 200 #define TEGRA124_CLK_CLK_M 201 -#define TEGRA124_CLK_CLK_M_DIV2 202 -#define TEGRA124_CLK_CLK_M_DIV4 203 +#define TEGRA124_CLK_OSC_DIV2 202 +#define TEGRA124_CLK_OSC_DIV4 203 #define TEGRA124_CLK_PLL_REF 204 #define TEGRA124_CLK_PLL_C 205 #define TEGRA124_CLK_PLL_C_OUT1 206 diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h index 44f60623f99b..6f65c14bf013 100644 --- a/include/dt-bindings/clock/tegra210-car.h +++ b/include/dt-bindings/clock/tegra210-car.h @@ -260,8 +260,8 @@ #define TEGRA210_CLK_FUSE_BURN 231 #define TEGRA210_CLK_CLK_32K 232 #define TEGRA210_CLK_CLK_M 233 -#define TEGRA210_CLK_CLK_M_DIV2 234 -#define TEGRA210_CLK_CLK_M_DIV4 235 +#define TEGRA210_CLK_OSC_DIV2 234 +#define TEGRA210_CLK_OSC_DIV4 235 #define TEGRA210_CLK_PLL_REF 236 #define TEGRA210_CLK_PLL_C 237 #define TEGRA210_CLK_PLL_C_OUT1 238 diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h index 3c90f1535551..907a8a04c280 100644 --- a/include/dt-bindings/clock/tegra30-car.h +++ b/include/dt-bindings/clock/tegra30-car.h @@ -194,8 +194,8 @@ #define TEGRA30_CLK_TVO 169 #define TEGRA30_CLK_CLK_32K 170 #define TEGRA30_CLK_CLK_M 171 -#define TEGRA30_CLK_CLK_M_DIV2 172 -#define TEGRA30_CLK_CLK_M_DIV4 173 +#define TEGRA30_CLK_OSC_DIV2 172 +#define TEGRA30_CLK_OSC_DIV4 173 #define TEGRA30_CLK_PLL_REF 174 #define TEGRA30_CLK_PLL_C 175 #define TEGRA30_CLK_PLL_C_OUT1 176 -- 2.7.4
|  |