Messages in this thread |  | | From | "Liu, Yi L" <> | Subject | RE: [PATCH V9 00/10] Nested Shared Virtual Address (SVA) VT-d support | Date | Wed, 29 Jan 2020 12:18:00 +0000 |
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> From: Jacob Pan [mailto:jacob.jun.pan@linux.intel.com] > Sent: Wednesday, January 29, 2020 2:02 PM > Subject: [PATCH V9 00/10] Nested Shared Virtual Address (SVA) VT-d support > > Shared virtual address (SVA), a.k.a, Shared virtual memory (SVM) on Intel platforms > allow address space sharing between device DMA and applications. > SVA can reduce programming complexity and enhance security. > This series is intended to enable SVA virtualization, i.e. enable use of SVA within a > guest user application. > > This is the remaining portion of the original patchset that is based on Joerg's x86/vt- > d branch. The preparatory and cleanup patches are merged here. > (git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git) > > Only IOMMU portion of the changes are included in this series. Additional support is > needed in VFIO and QEMU (will be submitted separately) to complete this > functionality. > > To make incremental changes and reduce the size of each patchset. This series does > not inlcude support for page request services. > > In VT-d implementation, PASID table is per device and maintained in the host. > Guest PASID table is shadowed in VMM where virtual IOMMU is emulated. > > .-------------. .---------------------------. > | vIOMMU | | Guest process CR3, FL only| > | | '---------------------------' > .----------------/ > | PASID Entry |--- PASID cache flush - > '-------------' | > | | V > | | CR3 in GPA > '-------------' > Guest > ------| Shadow |--------------------------|-------- > v v v > Host > .-------------. .----------------------. > | pIOMMU | | Bind FL for GVA-GPA | > | | '----------------------' > .----------------/ | > | PASID Entry | V (Nested xlate) > '----------------\.------------------------------. > | | |SL for GPA-HPA, default domain| > | | '------------------------------' > '-------------' > Where: > - FL = First level/stage one page tables > - SL = Second level/stage two page tables > > This is the remaining VT-d only portion of V5 since the uAPIs and IOASID common > code have been applied to Joerg's IOMMU core branch. > (https://lkml.org/lkml/2019/10/2/833) > > The complete set with VFIO patches are here: > https://github.com/jacobpan/linux.git:siov_sva
The complete QEMU set can be found in below link: https://github.com/luxis1999/qemu.git: sva_vtd_v9_rfcv3
Complete kernel can be found in: https://github.com/luxis1999/linux-vsva: vsva-linux-5.5-rc3
Regards, Yi Liu
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