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    Subject[PATCH 4.9 011/271] mlxsw: reg: QEEC: Add minimum shaper fields
    Date
    From: Petr Machata <petrm@mellanox.com>

    [ Upstream commit 8b931821aa04823e2e5df0ae93937baabbd23286 ]

    Add QEEC.mise (minimum shaper enable) and QEEC.min_shaper_rate to enable
    configuration of minimum shaper.

    Increase the QEEC length to 0x20 as well: that's the length that the
    register has had for a long time now, but with the configurations that
    mlxsw typically exercises, the firmware tolerated 0x1C-sized packets.
    With mise=true however, FW rejects packets unless they have the full
    required length.

    Fixes: b9b7cee40579 ("mlxsw: reg: Add QoS ETS Element Configuration register")
    Signed-off-by: Petr Machata <petrm@mellanox.com>
    Signed-off-by: Ido Schimmel <idosch@mellanox.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/net/ethernet/mellanox/mlxsw/reg.h | 22 +++++++++++++++++++++-
    1 file changed, 21 insertions(+), 1 deletion(-)

    diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
    index b2a745b579fd1..fdc69218c8cac 100644
    --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
    +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
    @@ -1873,7 +1873,7 @@ static inline void mlxsw_reg_qtct_pack(char *payload, u8 local_port,
    * Configures the ETS elements.
    */
    #define MLXSW_REG_QEEC_ID 0x400D
    -#define MLXSW_REG_QEEC_LEN 0x1C
    +#define MLXSW_REG_QEEC_LEN 0x20

    static const struct mlxsw_reg_info mlxsw_reg_qeec = {
    .id = MLXSW_REG_QEEC_ID,
    @@ -1918,6 +1918,15 @@ MLXSW_ITEM32(reg, qeec, element_index, 0x04, 0, 8);
    */
    MLXSW_ITEM32(reg, qeec, next_element_index, 0x08, 0, 8);

    +/* reg_qeec_mise
    + * Min shaper configuration enable. Enables configuration of the min
    + * shaper on this ETS element
    + * 0 - Disable
    + * 1 - Enable
    + * Access: RW
    + */
    +MLXSW_ITEM32(reg, qeec, mise, 0x0C, 31, 1);
    +
    enum {
    MLXSW_REG_QEEC_BYTES_MODE,
    MLXSW_REG_QEEC_PACKETS_MODE,
    @@ -1934,6 +1943,17 @@ enum {
    */
    MLXSW_ITEM32(reg, qeec, pb, 0x0C, 28, 1);

    +/* The smallest permitted min shaper rate. */
    +#define MLXSW_REG_QEEC_MIS_MIN 200000 /* Kbps */
    +
    +/* reg_qeec_min_shaper_rate
    + * Min shaper information rate.
    + * For CPU port, can only be configured for port hierarchy.
    + * When in bytes mode, value is specified in units of 1000bps.
    + * Access: RW
    + */
    +MLXSW_ITEM32(reg, qeec, min_shaper_rate, 0x0C, 0, 28);
    +
    /* reg_qeec_mase
    * Max shaper configuration enable. Enables configuration of the max
    * shaper on this ETS element.
    --
    2.20.1


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