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    Subject[PATCH 4.19 308/639] net: hns3: fix for vport->bw_limit overflow problem
    Date
    From: Yunsheng Lin <linyunsheng@huawei.com>

    [ Upstream commit 2566f10676ba996b745e138f54f3e2f974311692 ]

    When setting vport->bw_limit to hdev->tm_info.pg_info[0].bw_limit
    in hclge_tm_vport_tc_info_update, vport->bw_limit can be as big as
    HCLGE_ETHER_MAX_RATE (100000), which can not fit into u16 (65535).

    So this patch fixes it by using u32 for vport->bw_limit.

    Fixes: 848440544b41 ("net: hns3: Add support of TX Scheduler & Shaper to HNS3 driver")
    Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
    Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com>
    Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
    Signed-off-by: David S. Miller <davem@davemloft.net>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
    index 260b1e7796908..d14b7018fdf34 100644
    --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
    +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h
    @@ -600,7 +600,7 @@ struct hclge_vport {
    u16 alloc_rss_size;

    u16 qs_offset;
    - u16 bw_limit; /* VSI BW Limit (0 = disabled) */
    + u32 bw_limit; /* VSI BW Limit (0 = disabled) */
    u8 dwrr;

    struct hclge_tx_vtag_cfg txvlan_cfg;
    --
    2.20.1


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