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SubjectRe: [PATCH RFC v2 06/14] dt-bindings/interrupt-controller: pdc: add SPI config register
On Fri, 13 Sep 2019 15:59:14 -0600, Lina Iyer wrote:
> In addition to configuring the PDC, additional registers that interface
> the GIC have to be configured to match the GPIO type. The registers on
> some QCOM SoCs are access restricted, while on other SoCs are not. They
> SoCs with access restriction to these SPI registers need to be written
> from the firmware using the SCM interface. Add a flag to indicate if the
> register is to be written using SCM interface.
>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Lina Iyer <ilina@codeaurora.org>
> ---
> .../devicetree/bindings/interrupt-controller/qcom,pdc.txt | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>

Reviewed-by: Rob Herring <robh@kernel.org>

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