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Subject[PATCH 0/3] ARM: dts: SDRAM and L2 cache EDAC for Armada SoCs
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This series was waiting for the armada_xp edac driver to be accepted.
Now that it has the relevant nodes can be added to the Armada SoCs. So
that boards can use the EDAC driver if they have the hardware support.

The db-xc3-24g4xg.dts board doesn't have an ECC chip for it's DDR but it
can use the L2 cache parity and ecc support.

Chris Packham (3):
ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg
ARM: dts: mvebu: add sdram controller node to Armada-38x
ARM: dts: armada-xp: add label to sdram-controller node

arch/arm/boot/dts/armada-38x.dtsi | 5 +++++
arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 2 +-
arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts | 5 +++++
arch/arm/boot/dts/armada-xp.dtsi | 2 +-
4 files changed, 12 insertions(+), 2 deletions(-)

--
2.23.0

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