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SubjectRe: [PATCH v3 4/7] usb: mtk-xhci: support ip-sleep wakeup for MT8183
Hi Chunfeng,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[cannot apply to v5.3-rc6 next-20190830]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Chunfeng-Yun/add-support-USB-for-MT8183/20190901-163637
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=ia64

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

In file included from include/linux/bitops.h:5:0,
from include/linux/kernel.h:12,
from include/linux/clk.h:13,
from drivers/usb/host/xhci-mtk.c:10:
drivers/usb/host/xhci-mtk.c: In function 'usb_wakeup_ip_sleep_set':
include/linux/bits.h:8:19: warning: large integer implicitly truncated to unsigned type [-Woverflow]
#define BIT(nr) (UL(1) << (nr))
^
>> drivers/usb/host/xhci-mtk.c:64:19: note: in expansion of macro 'BIT'
#define WC0_IS_EN BIT(6)
^~~
>> drivers/usb/host/xhci-mtk.c:294:9: note: in expansion of macro 'WC0_IS_EN'
msk = WC0_IS_EN | WC0_IS_C(0xf) | WC0_IS_P;
^~~~~~~~~

vim +/BIT +64 drivers/usb/host/xhci-mtk.c

> 10 #include <linux/clk.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/iopoll.h>
13 #include <linux/kernel.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 #include <linux/regulator/consumer.h>
21
22 #include "xhci.h"
23 #include "xhci-mtk.h"
24
25 /* ip_pw_ctrl0 register */
26 #define CTRL0_IP_SW_RST BIT(0)
27
28 /* ip_pw_ctrl1 register */
29 #define CTRL1_IP_HOST_PDN BIT(0)
30
31 /* ip_pw_ctrl2 register */
32 #define CTRL2_IP_DEV_PDN BIT(0)
33
34 /* ip_pw_sts1 register */
35 #define STS1_IP_SLEEP_STS BIT(30)
36 #define STS1_U3_MAC_RST BIT(16)
37 #define STS1_XHCI_RST BIT(11)
38 #define STS1_SYS125_RST BIT(10)
39 #define STS1_REF_RST BIT(8)
40 #define STS1_SYSPLL_STABLE BIT(0)
41
42 /* ip_xhci_cap register */
43 #define CAP_U3_PORT_NUM(p) ((p) & 0xff)
44 #define CAP_U2_PORT_NUM(p) (((p) >> 8) & 0xff)
45
46 /* u3_ctrl_p register */
47 #define CTRL_U3_PORT_HOST_SEL BIT(2)
48 #define CTRL_U3_PORT_PDN BIT(1)
49 #define CTRL_U3_PORT_DIS BIT(0)
50
51 /* u2_ctrl_p register */
52 #define CTRL_U2_PORT_HOST_SEL BIT(2)
53 #define CTRL_U2_PORT_PDN BIT(1)
54 #define CTRL_U2_PORT_DIS BIT(0)
55
56 /* u2_phy_pll register */
57 #define CTRL_U2_FORCE_PLL_STB BIT(28)
58
59 /* usb remote wakeup registers in syscon */
60 /* mt8183 etc */
61 #define PERI_WK_CTRL0 0x20
62 #define WC0_IS_C(x) (((x) & 0xf) << 28) /* cycle debounce */
63 #define WC0_IS_P BIT(12) /* polarity */
> 64 #define WC0_IS_EN BIT(6)
65

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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