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Subject[tip:perf/core] perf jevents: Add support for Hisi hip08 L3C PMU aliasing
Commit-ID:  edd93a4076cf18ede423c167de6d6fb8e4211e7b
Gitweb: https://git.kernel.org/tip/edd93a4076cf18ede423c167de6d6fb8e4211e7b
Author: John Garry <john.garry@huawei.com>
AuthorDate: Fri, 28 Jun 2019 22:35:52 +0800
Committer: Arnaldo Carvalho de Melo <acme@redhat.com>
CommitDate: Tue, 2 Jul 2019 16:08:16 -0300

perf jevents: Add support for Hisi hip08 L3C PMU aliasing

Add support for Hisi hip08 L3C PMU aliasing.

The kernel driver is in drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Jiri Olsa <jolsa@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ben Hutchings <ben@decadent.org.uk>
Cc: Hendrik Brueckner <brueckner@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxarm@huawei.com
Link: http://lkml.kernel.org/r/1561732552-143038-5-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
---
.../arch/arm64/hisilicon/hip08/uncore-l3c.json | 37 ++++++++++++++++++++++
tools/perf/pmu-events/jevents.c | 1 +
2 files changed, 38 insertions(+)

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
new file mode 100644
index 000000000000..ca48747642e1
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
@@ -0,0 +1,37 @@
+[
+ {
+ "EventCode": "0x00",
+ "EventName": "uncore_hisi_l3c.rd_cpipe",
+ "BriefDescription": "Total read accesses",
+ "PublicDescription": "Total read accesses",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x01",
+ "EventName": "uncore_hisi_l3c.wr_cpipe",
+ "BriefDescription": "Total write accesses",
+ "PublicDescription": "Total write accesses",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x02",
+ "EventName": "uncore_hisi_l3c.rd_hit_cpipe",
+ "BriefDescription": "Total read hits",
+ "PublicDescription": "Total read hits",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x03",
+ "EventName": "uncore_hisi_l3c.wr_hit_cpipe",
+ "BriefDescription": "Total write hits",
+ "PublicDescription": "Total write hits",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x04",
+ "EventName": "uncore_hisi_l3c.victim_num",
+ "BriefDescription": "l3c precharge commands",
+ "PublicDescription": "l3c precharge commands",
+ "Unit": "hisi_sccl,l3c",
+ },
+]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index 3c95affd85a4..287a6f10ca48 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -238,6 +238,7 @@ static struct map {
{ "UPI LL", "uncore_upi" },
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
{ "hisi_sccl,hha", "hisi_sccl,hha" },
+ { "hisi_sccl,l3c", "hisi_sccl,l3c" },
{}
};

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