lkml.org 
[lkml]   [2019]   [Jul]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRe: [PATCH] riscv: kbuild: add virtual memory system selection
On Sat, Jul 27, 2019 at 4:00 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
>
> The RISC-V specifications currently define three virtual memory
> translation systems: Sv32, Sv39, and Sv48. Sv32 is currently specific
> to 32-bit systems; Sv39 and Sv48 are currently specific to 64-bit
> systems. The current kernel only supports Sv32 and Sv39, but we'd
> like to start preparing for Sv48. As an initial step, allow the
> virtual memory translation system to be selected via kbuild, and stop
> the build if an option is selected that the kernel doen't currently
> support.
>
> This patch currently has no functional impact.
>
> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> Cc: Alexandre Ghiti <alex@ghiti.fr>
> ---
> arch/riscv/Kconfig | 43 +++++++++++++++++++++++++++++
> arch/riscv/include/asm/pgtable-32.h | 4 +++
> arch/riscv/include/asm/pgtable-64.h | 4 +++
> 3 files changed, 51 insertions(+)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 59a4727ecd6c..8ef64fe2c2b3 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -155,6 +155,49 @@ config MODULE_SECTIONS
> bool
> select HAVE_MOD_ARCH_SPECIFIC
>
> +choice
> + prompt "Virtual Memory System"
> + default RISCV_VM_SV32 if 32BIT
> + default RISCV_VM_SV39 if 64BIT
> + help
> + The RISC-V Instruction Set Manual Volume II: Privileged
> + Architecture defines several different "virtual memory
> + systems" which specify virtual and physical address formats
> + and the structure of page table entries. This determines
> + the amount of virtual address space present and how it is
> + translated into physical addresses.
> +
> + config RISCV_VM_SV32
> + depends on 32BIT
> + bool "RISC-V Sv32"
> + help
> + The Sv32 virtual memory system is a page-based
> + address and page table format for RV32 systems.
> + It specifies a translation between 32-bit virtual
> + addresses and 33-bit physical addresses, via a
> + two-stage page table layout.
> + config RISCV_VM_SV39
> + depends on 64BIT
> + bool "RISC-V Sv39"
> + help
> + The Sv39 virtual memory system is a page-based
> + address and page table format for RV64 systems.
> + It specifies a translation between 39-bit virtual
> + addresses and 40-bit physical addresses, via a

The spec does not mention 40-bit physical addresses, but 56-bit.

> + three-stage page table layout.
> + config RISCV_VM_SV48
> + depends on 64BIT
> + bool "RISC-V Sv48"
> + help
> + The Sv48 virtual memory system is a page-based
> + address and page table format for RV64 systems.
> + It specifies a translation between 48-bit virtual
> + addresses and 49-bit physical addresses, via a

ditto.

> + four-stage page table layout.
> +
> +endchoice
> +
> +
> choice
> prompt "Maximum Physical Memory"
> default MAXPHYSMEM_2GB if 32BIT
> diff --git a/arch/riscv/include/asm/pgtable-32.h b/arch/riscv/include/asm/pgtable-32.h
> index b0ab66e5fdb1..86d41a04735b 100644
> --- a/arch/riscv/include/asm/pgtable-32.h
> +++ b/arch/riscv/include/asm/pgtable-32.h
> @@ -6,6 +6,10 @@
> #ifndef _ASM_RISCV_PGTABLE_32_H
> #define _ASM_RISCV_PGTABLE_32_H
>
> +#if !defined(CONFIG_RISCV_VM_SV32)
> +#error Only Sv32 supported
> +#endif
> +
> #include <asm-generic/pgtable-nopmd.h>
> #include <linux/const.h>
>
> diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h
> index 74630989006d..86935595115d 100644
> --- a/arch/riscv/include/asm/pgtable-64.h
> +++ b/arch/riscv/include/asm/pgtable-64.h
> @@ -6,6 +6,10 @@
> #ifndef _ASM_RISCV_PGTABLE_64_H
> #define _ASM_RISCV_PGTABLE_64_H
>
> +#if !defined(CONFIG_RISCV_VM_SV39)
> +#error Only Sv39 supported for now
> +#endif
> +
> #include <linux/const.h>
>
> #define PGDIR_SHIFT 30
> --

Regards,
Bin

\
 
 \ /
  Last update: 2019-07-28 15:38    [W:0.088 / U:5.704 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site