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SubjectRe: [PATCH v1 43/50] ARM: dts: exynos: add bus_isp in Exynos5422
On Mon, 15 Jul 2019 at 14:45, Lukasz Luba <l.luba@partner.samsung.com> wrote:
>
> Add bus_isp which changes ACLK400_ISP clock speed according to the bus
> documentation in the documentation. The bus_isp OPP table has been
> aligned to the new parent rate.

Title and msg needs fixing.

Please squash it with patch 18.

Best regards,
Krzysztof

> This patch sets the proper parent and
> picks the init frequency before the devfreq governor starts working.
> It sets also parent rate (DPLL to 1200MHz).
>
> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
> ---
> arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> index 990fe03fce75..852cb3dd495d 100644
> --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
> @@ -166,6 +166,18 @@
> status = "okay";
> };
>
> +&bus_isp {
> + devfreq = <&bus_wcore>;
> + assigned-clocks = <&clock CLK_MOUT_ACLK400_ISP>,
> + <&clock CLK_MOUT_SW_ACLK400_ISP>,
> + <&clock CLK_DOUT_ACLK400_ISP>,
> + <&clock CLK_FOUT_DPLL>;
> + assigned-clock-parents = <&clock CLK_MOUT_SCLK_DPLL>,
> + <&clock CLK_DOUT_ACLK400_ISP>;
> + assigned-clock-rates = <0>, <0>, <400000000>, <1200000000>;
> + status = "okay";
> +};
> +
> &cpu0 {
> cpu-supply = <&buck6_reg>;
> };
> --
> 2.17.1
>

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