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SubjectRe: [PATCH v1] KVM: x86: PMU Whitelist
On 06/04/2019 01:30 AM, Eric Hankland wrote:
> On Sat, Jun 1, 2019 at 3:50 AM Wei Wang <> wrote:
>> My question is that have we proved that this indirect info leakage
>> indeed happens?
>> The spec states that the counter will count the related events generated by
>> the logical CPU with AnyThread=0. I would be inclined to trust the
>> hardware behavior
>> documented in the spec unless we could prove there is a problem.
> I'm not disputing the spec with regards to AnyThread=0; my point is
> that LLC contention can be quantified using the PMU regardless of
> whether or not you are measuring only the logical CPU you are running
> on.

So, I'm not sure if "quantifying LLC contention" has been proved to
be a real issue. If this is considered to be an issue:

- without PMU, we could also write a piece of software to run in the
guest to quantify that contention (e.g. by analyzing the memory access
latency). How do you prevent this?

- the same thing could also happen with the L1 cache (e.g. a vCPU
and a host thread run 2 logical CPUs on the same core). If this is disabled
as well, we may have very few events usable, and would like to see what you
have on the whitelist.


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