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SubjectRe: [PATCH v4 3/5] net: macb: add support for c45 PHY
On Sun, Jun 23, 2019 at 10:23:17AM +0100, Parshuram Thombare wrote:
> This patch modify MDIO read/write functions to support
> communication with C45 PHY.

Which Clause 45 PHY are you using?

>
> Signed-off-by: Parshuram Thombare <pthombar@cadence.com>
> ---
> drivers/net/ethernet/cadence/macb.h | 15 ++++--
> drivers/net/ethernet/cadence/macb_main.c | 61 +++++++++++++++++++-----
> 2 files changed, 61 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
> index 6d268283c318..330da702b946 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -642,10 +642,17 @@
> #define GEM_CLK_DIV96 5
>
> /* Constants for MAN register */
> -#define MACB_MAN_SOF 1
> -#define MACB_MAN_WRITE 1
> -#define MACB_MAN_READ 2
> -#define MACB_MAN_CODE 2
> +#define MACB_MAN_C22_SOF 1
> +#define MACB_MAN_C22_WRITE 1
> +#define MACB_MAN_C22_READ 2
> +#define MACB_MAN_C22_CODE 2
> +
> +#define MACB_MAN_C45_SOF 0
> +#define MACB_MAN_C45_ADDR 0
> +#define MACB_MAN_C45_WRITE 1
> +#define MACB_MAN_C45_POST_READ_INCR 2
> +#define MACB_MAN_C45_READ 3
> +#define MACB_MAN_C45_CODE 2
>
> /* Capability mask bits */
> #define MACB_CAPS_ISR_CLEAR_ON_WRITE BIT(0)
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 10d18b2cef31..94145e460e6e 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -341,11 +341,30 @@ static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
> if (status < 0)
> goto mdio_read_exit;
>
> - macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
> - | MACB_BF(RW, MACB_MAN_READ)
> - | MACB_BF(PHYA, mii_id)
> - | MACB_BF(REGA, regnum)
> - | MACB_BF(CODE, MACB_MAN_CODE)));
> + if (regnum & MII_ADDR_C45) {
> + macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
> + | MACB_BF(RW, MACB_MAN_C45_ADDR)
> + | MACB_BF(PHYA, mii_id)
> + | MACB_BF(REGA, (regnum >> 16) & 0x1F)
> + | MACB_BF(DATA, regnum & 0xFFFF)
> + | MACB_BF(CODE, MACB_MAN_C45_CODE)));
> +
> + status = macb_mdio_wait_for_idle(bp);
> + if (status < 0)
> + goto mdio_read_exit;
> +
> + macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
> + | MACB_BF(RW, MACB_MAN_C45_READ)
> + | MACB_BF(PHYA, mii_id)
> + | MACB_BF(REGA, (regnum >> 16) & 0x1F)
> + | MACB_BF(CODE, MACB_MAN_C45_CODE)));
> + } else {
> + macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C22_SOF)
> + | MACB_BF(RW, MACB_MAN_C22_READ)
> + | MACB_BF(PHYA, mii_id)
> + | MACB_BF(REGA, regnum)
> + | MACB_BF(CODE, MACB_MAN_C22_CODE)));
> + }
>
> status = macb_mdio_wait_for_idle(bp);
> if (status < 0)
> @@ -374,12 +393,32 @@ static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
> if (status < 0)
> goto mdio_write_exit;
>
> - macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
> - | MACB_BF(RW, MACB_MAN_WRITE)
> - | MACB_BF(PHYA, mii_id)
> - | MACB_BF(REGA, regnum)
> - | MACB_BF(CODE, MACB_MAN_CODE)
> - | MACB_BF(DATA, value)));
> + if (regnum & MII_ADDR_C45) {
> + macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
> + | MACB_BF(RW, MACB_MAN_C45_ADDR)
> + | MACB_BF(PHYA, mii_id)
> + | MACB_BF(REGA, (regnum >> 16) & 0x1F)
> + | MACB_BF(DATA, regnum & 0xFFFF)
> + | MACB_BF(CODE, MACB_MAN_C45_CODE)));
> +
> + status = macb_mdio_wait_for_idle(bp);
> + if (status < 0)
> + goto mdio_write_exit;
> +
> + macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C45_SOF)
> + | MACB_BF(RW, MACB_MAN_C45_WRITE)
> + | MACB_BF(PHYA, mii_id)
> + | MACB_BF(REGA, (regnum >> 16) & 0x1F)
> + | MACB_BF(CODE, MACB_MAN_C45_CODE)
> + | MACB_BF(DATA, value)));
> + } else {
> + macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_C22_SOF)
> + | MACB_BF(RW, MACB_MAN_C22_WRITE)
> + | MACB_BF(PHYA, mii_id)
> + | MACB_BF(REGA, regnum)
> + | MACB_BF(CODE, MACB_MAN_C22_CODE)
> + | MACB_BF(DATA, value)));
> + }
>
> status = macb_mdio_wait_for_idle(bp);
> if (status < 0)
> --
> 2.17.1
>
>

--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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