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SubjectRe: [PATCH v2] drm/msm/dsi: Add parentheses to quirks check in dsi_phy_hw_v3_0_lane_settings
On Wed, Jun 19, 2019 at 12:32 PM Sean Paul <sean@poorly.run> wrote:
>
> On Wed, Jun 19, 2019 at 12:17:23PM -0700, Nathan Chancellor wrote:
> > Clang warns:
> >
> > drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c:80:6: warning: logical not is
> > only applied to the left hand side of this bitwise operator
> > [-Wlogical-not-parentheses]
> > if (!phy->cfg->quirks & V3_0_0_10NM_OLD_TIMINGS_QUIRK) {
> > ^ ~
> > drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c:80:6: note: add parentheses
> > after the '!' to evaluate the bitwise operator first
> > if (!phy->cfg->quirks & V3_0_0_10NM_OLD_TIMINGS_QUIRK) {
> > ^
> > ( )
> > drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c:80:6: note: add parentheses
> > around left hand side expression to silence this warning
> > if (!phy->cfg->quirks & V3_0_0_10NM_OLD_TIMINGS_QUIRK) {
> > ^
> > ( )
> > 1 warning generated.
> >
> > Add parentheses around the bitwise AND so it is evaluated first then
> > negated.
> >
> > Fixes: 3dbbf8f09e83 ("drm/msm/dsi: Add old timings quirk for 10nm phy")
>
> Hmm, so it looks like this patch isn't upstream. What tree are you basing this
> on?

it is in msm-next-staging.. (which will be pushed to msm-next after
some testing)

I've pulled Nathan's patch in on top..

BR,
-R

>
> Sean
>
> > Link: https://github.com/ClangBuiltLinux/linux/issues/547
> > Reported-by: kbuild test robot <lkp@intel.com>
> > Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
> > Reviewed-by: Sean Paul <sean@poorly.run>
> > Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
> > ---
> >
> > v1 -> v2:
> >
> > * Fix broken link (thanks to Sean for pointing it out)
> > * Add Sean's reviewed-by
> >
> > drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> > index eb28937f4b34..47403d4f2d28 100644
> > --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> > +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
> > @@ -77,7 +77,7 @@ static void dsi_phy_hw_v3_0_lane_settings(struct msm_dsi_phy *phy)
> > tx_dctrl[i]);
> > }
> >
> > - if (!phy->cfg->quirks & V3_0_0_10NM_OLD_TIMINGS_QUIRK) {
> > + if (!(phy->cfg->quirks & V3_0_0_10NM_OLD_TIMINGS_QUIRK)) {
> > /* Toggle BIT 0 to release freeze I/0 */
> > dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_TX_DCTRL(3), 0x05);
> > dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_TX_DCTRL(3), 0x04);
> > --
> > 2.22.0
> >
>
> --
> Sean Paul, Software Engineer, Google / Chromium OS

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