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SubjectRe: [PATCH v1 2/2] soc: nuvoton: add NPCM LPC BPC driver
On Mon, Jun 10, 2019 at 4:19 PM Tomer Maimon <> wrote:
> Add Nuvoton BMC NPCM BIOS post code (BPC) driver.
> The NPCM BPC monitoring two I/O address written by
> the host on the Low Pin Count (LPC) bus, the capure
> data stored in 128-word FIFO.
> Signed-off-by: Tomer Maimon <>

We've run into this situation before, but don't have a good solution yet:

The driver seems useful and well implemented, but I keep having a bad
feeling about adding a chardev driver into drivers/soc for something that
is clearly specific to a particular implementation on the hardware side
but generic on the user interface. The same user interface might be
used on an Aspeed BMC or any other one, so please coordinate at
least between Novoton and Aspeed developers on creating a common
user interface, and review each other's patches.

Maybe we can introduce a drivers/bmc/ (or even drivers/openbmc)
that collects all those user interfaces with a thin abstraction layer
and one or two hardware specific back-ends?


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