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SubjectRE: [EXT] Re: [PATCH 1/3] dt-bindings: i2c: add optional mul-value property to binding
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> -----Original Message-----
> From: Chuanhua Han
> Sent: Wednesday, May 8, 2019 6:45 AM
> To: Rob Herring <robh@kernel.org>
> Cc: mark.rutland@arm.com; shawnguo@kernel.org;
> s.hauer@pengutronix.de; Leo Li <leoyang.li@nxp.com>; linux-
> kernel@vger.kernel.org; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-i2c@vger.kernel.org;
> kernel@pengutronix.de; dl-linux-imx <linux-imx@nxp.com>;
> festevam@gmail.com; wsa+renesas@sang-engineering.com; u.kleine-
> koenig@pengutronix.de; eha@deif.com; linux@rempel-privat.de; Sumit
> Batra <sumit.batra@nxp.com>; l.stach@pengutronix.de; peda@axentia.se
> Subject: RE: [EXT] Re: [PATCH 1/3] dt-bindings: i2c: add optional mul-value
> property to binding
>
>
>
> > -----Original Message-----
> > From: Rob Herring <robh@kernel.org>
> > Sent: 2019年5月3日 4:59
> > To: Chuanhua Han <chuanhua.han@nxp.com>
> > Cc: mark.rutland@arm.com; shawnguo@kernel.org;
> s.hauer@pengutronix.de;
> > Leo Li <leoyang.li@nxp.com>; linux-kernel@vger.kernel.org;
> > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > linux-i2c@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
> > <linux-imx@nxp.com>; festevam@gmail.com;
> > wsa+renesas@sang-engineering.com; u.kleine-koenig@pengutronix.de;
> > eha@deif.com; linux@rempel-privat.de; Sumit Batra
> > <sumit.batra@nxp.com>; l.stach@pengutronix.de; peda@axentia.se
> > Subject: [EXT] Re: [PATCH 1/3] dt-bindings: i2c: add optional
> > mul-value property to binding
> >
> > Caution: EXT Email
> >
> > On Tue, Apr 30, 2019 at 12:32:40PM +0800, Chuanhua Han wrote:
> > > NXP Layerscape SoC have up to three MUL options available for all
> > > divider values, we choice of MUL determines the internal monitor
> > > rate of the I2C bus (SCL and SDA signals):
> > > A lower MUL value results in a higher sampling rate of the I2C signals.
> > > A higher MUL value results in a lower sampling rate of the I2C signals.
> > >
> > > So in Optional properties we added our custom mul-value property in
> > > the binding to select which mul option for the device tree i2c
> > > controller node.
> > >
> > > Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
> > > ---
> > > Documentation/devicetree/bindings/i2c/i2c-imx.txt | 3 +++
> > > 1 file changed, 3 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt
> > > b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
> > > index b967544590e8..ba8e7b7b3fa8 100644
> > > --- a/Documentation/devicetree/bindings/i2c/i2c-imx.txt
> > > +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
> > > @@ -18,6 +18,9 @@ Optional properties:
> > > - sda-gpios: specify the gpio related to SDA pin
> > > - pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c
> > > bus recovery, call it "gpio" state
> > > +- mul-value: NXP Layerscape SoC have up to three MUL options
> > > +available for all I2C divider values, it describes which MUL we
> > > +choose to use for the driver, the values should be 1,2,4.
> >
> > Needs a vendor prefix. I don't find 'value' to add anything nor do I
> > understand what MUL is.
> Yes,you are right!
> >
> > If it is determined by SoC rather than board, then it should perhaps
> > be implied by compatible.
> This is determined by the SOC, but it has three options to choose from, so I
> think it's better to use the optional option instead of compatible

If there is only one best choice for each SoC letting the SoC compatible determine it will be the best. Unless different board designs(use cases) of the same SoC requires different MUL settings, I also don't see much value of making it defined in device tree.

Regards,
Leo
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