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SubjectRe: [PATCH 4/9] perf/x86/intel: Support hardware TopDown metrics
On Tue, May 28, 2019 at 02:24:56PM -0400, Liang, Kan wrote:
>
>
> On 5/28/2019 9:48 AM, Peter Zijlstra wrote:
> > On Tue, May 21, 2019 at 02:40:50PM -0700, kan.liang@linux.intel.com wrote:
> > > diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> > > index b980b9e95d2a..0d7081434d1d 100644
> > > --- a/include/linux/perf_event.h
> > > +++ b/include/linux/perf_event.h
> > > @@ -133,6 +133,11 @@ struct hw_perf_event {
> > > struct hw_perf_event_extra extra_reg;
> > > struct hw_perf_event_extra branch_reg;
> > > +
> > > + u64 saved_metric;
> > > + u64 saved_slots;
> > > + u64 last_slots;
> > > + u64 last_metric;
> >
> > This is really sad, and I'm thinking much of that really isn't needed
> > anyway, due to how you're not using some of the other fields.
>
> If we don't cache the value, we have to update all metrics events when
> reading any metrics event. I think that could bring high overhead.

Since you don't support sampling, or even 'normal' functionality on this
FIXED3/SLOTS thing, you'll not use prev_count, sample_period,
last_period, period_left, interrupts_seq, interrupts, freq_time_stamp
and freq_count_stamp.

So why do you then need to grow the data structure with 4 more nonsense
fields?

Also, I'm not sure what you need those last things for, you reset the
value to 0 every time you read them, there is no delta to track.

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