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SubjectRe: ARM router NAT performance affected by random/unrelated commits
On Tue, May 21, 2019 at 12:28:48PM +0200, Rafał Miłecki wrote:
> Hi,
> I work on home routers based on Broadcom's Northstar SoCs. Those devices
> have ARM Cortex-A9 and most of them are dual-core.
> As for home routers, my main concern is network performance. That CPU
> isn't powerful enough to handle gigabit traffic so all kind of
> optimizations do matter. I noticed some unexpected changes in NAT
> performance when switching between kernels.
> My hardware is BCM47094 SoC (dual core ARM) with integrated network
> controller and external BCM53012 switch.

Guessing, I'd say it's to do with the placement of code wrt cachelines.
You could try aligning some of the cache flushing code to a cache line
and see what effect that has.

RMK's Patch system:
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to 11.9Mbps down 500kbps up

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