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SubjectRe: [RFC v2 09/11] drm/msm/dpu: Use OPP API to set clk/perf state
On 20-03-19, 15:19, Rajendra Nayak wrote:
> On some qualcomm platforms DPU needs to express a perforamnce state
> requirement on a power domain depennding on the clock rates.
> Use OPP table from DT to register with OPP framework and use
> dev_pm_opp_set_rate() to set the clk/perf state.
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 7 ++++++-
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 9 +++++++++
> 2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> index 9f20f397f77d..db21a86b242b 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
> @@ -15,6 +15,7 @@
> #include <linux/debugfs.h>
> #include <linux/errno.h>
> #include <linux/mutex.h>
> +#include <linux/pm_opp.h>
> #include <linux/sort.h>
> #include <linux/clk.h>
> #include <linux/bitmap.h>
> @@ -298,7 +299,11 @@ static int _dpu_core_perf_set_core_clk_rate(struct dpu_kms *kms, u64 rate)
> rate = core_clk->max_rate;
>
> core_clk->rate = rate;
> - return msm_dss_clk_set_rate(core_clk, 1);
> +
> + if (dev_pm_opp_get_opp_table(&kms->pdev->dev))

This takes a reference of the OPP table, you need to call put thing as well to
balance it off.

> + return dev_pm_opp_set_rate(&kms->pdev->dev, core_clk->rate);
> + else
> + return msm_dss_clk_set_rate(core_clk, 1);
> }
--
viresh

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