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SubjectRE: [PATCH v5 0/8] arm64: meson: Add support for USB on Amlogic G12A
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Hi Neil,


> Hi Greg, Felipe, Minas,
>
> Gentle ping about these remaining patches, who is supposed to pick them ?
>

I set my Acked-by tag to dwc2 related patch:
[PATCH 7/8] usb: dwc2: Add Amlogic G12A DWC2 Params
Other out of my responsibilities.

Thanks,
Minas



> Thanks,
> Neil
>
> On 25/03/2019 10:39, Neil Armstrong wrote:
>> This patchset adds support for USB on Amlogic G12A SoCs.
>>
>> This patchset is composed with :
>> - bindings of the PHYs
>> - bindings of the USB Control Glue
>> - PHY Drivers
>> - USB Control Glue driver
>>
>> Device Tree nodes will be added in a separate patchset.
>>
>> The Amlogic G12A USB Complex is composed of :
>> - 2 USB Controllers :
>> * DWC3 for USB2 and USB3 Host functionality
>> * DWC2 for USB2 Peripheral functionality
>> - 2 USB2 OTG PHYs, only a single one will be routed to either DWC2 to
>> DWC3
>> - 1 USB3 PHY shared with PCIE funcionnality
>> - A Glue to control PHY routing, setup and OTG detection
>>
>> The Glue configures the UTMI 8bit interfaces for the USB2 PHYs,
>> including routing of the OTG PHY between the DWC3 and DWC2
>> controllers, and setups the on-chip OTG mode selection for this PHY.
>>
>> This drivers supports the on-probe setup of the OTG mode, and manually
>> via the USB Role interface. The IRQ mode change detect is yet to be
>> added in a future patchset, mainly due to lack of hardware to validate on.
>>
>> Changes since v4 at [3]:
>> - remove remaining phy_put/clk_put() of patch 8
>> - handled phy_power_off/on() in suspend/resume
>> - Collected review tag on patch 8
>>
>> Changes since v3 at [2]:
>> - Documented and replaced magic values in USB2 PHY driver
>>
>> Changes since v2 at [1]:
>> - Collected review tags
>> - Removed syscon.h in usb2 phy driver
>> - Added comment on the USB3/PCIe switch
>> - Renamed dwc3_meson_g12a_usb_init_mode in glue driver
>> - Changed indentation in dwc3_meson_g12a_role_set
>> - Switched to of_get_compatible_child in glue code
>> - Added devm_add_action_or_reset() to disable clock in case of probe
>> failure
>> - Checks priv->vbus before enabling regulator
>> - Switched phy_init/phy_power_on
>> - Removed priv->phys[i] NULL checks in suspend code
>> - Removed clk_disable_unprepare/clk_put in remove code
>>
>> Changes since v1 at [0]:
>> - USB2 PHY Bindings: collected tags and updated commit log
>> - USB3/PCIE PHY Bindings: collected tag and updated reset list
>> - DWC2 Compatible: collected tags
>> - DWC3 Glue Bindings:
>> - removed clock-names and reset-names for single entries
>> - removed ports graph for PHYs and replaced by phys list with phy-names
>> - added dr_mode and optional vbus-supply
>> - fixed example
>> - USB2 PHY Driver: removed USB_SUPPORT and otg.h include
>> - USB3/PCIE PHY Driver: removed USB_SUPPORT, fixed comment and unused
>> reg variable
>> - USB Glue Driver:
>> - Moved debugfs I/F to USB_ROLE_SWITCH framework
>> - Integrated USB Glue Control Registers offset
>> - Removed of graph parsing to use devm_phy_optional_get()
>> - Fixed PHY mode handling and OTG switching
>> - Simplified PHY calls by removing the NULL test
>> - Added optional vbus regulator handling
>>
>> [1]
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__lkml.kernel.org_r
>> _20190212151413.24632-2D1-2Dnarmstrong-40baylibre.com&d=DwICaQ&c=DPL6_
>> X_6JkXFx7AXWqB0tg&r=cQBKt4q-qzNVC53rNAwuwplH23V61rHQhhULvdLA0U8&m=JpHS
>> pNXFOjqz2mQIFEbLclNsBGFFLrjgWzl5raSOnY0&s=IgoSa-bVc4LdJUXwO5emFfIsnHAf
>> M5rDvLwaAzOiZSA&e= [2]
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__lkml.kernel.org_r
>> _20190304103846.2060-2D1-2Dnarmstrong-40baylibre.com&d=DwICaQ&c=DPL6_X
>> _6JkXFx7AXWqB0tg&r=cQBKt4q-qzNVC53rNAwuwplH23V61rHQhhULvdLA0U8&m=JpHSp
>> NXFOjqz2mQIFEbLclNsBGFFLrjgWzl5raSOnY0&s=xlNfpSTqe4BX8SRvs-QGbvQ69FRPm
>> 6FYPn2XtP7aTtQ&e= [3]
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__lkml.kernel.org_r
>> _20190318101153.7531-2D1-2Dnarmstrong-40baylibre.com&d=DwICaQ&c=DPL6_X
>> _6JkXFx7AXWqB0tg&r=cQBKt4q-qzNVC53rNAwuwplH23V61rHQhhULvdLA0U8&m=JpHSp
>> NXFOjqz2mQIFEbLclNsBGFFLrjgWzl5raSOnY0&s=cJJQpmMW7S91S_77ss6Fz2Cx03jKl
>> Pm2j8rE4jIu_gw&e= [4]
>> https://urldefense.proofpoint.com/v2/url?u=https-3A__lkml.kernel.org_r
>> _20190318132655.30040-2D1-2Dnarmstrong-40baylibre.com&d=DwICaQ&c=DPL6_
>> X_6JkXFx7AXWqB0tg&r=cQBKt4q-qzNVC53rNAwuwplH23V61rHQhhULvdLA0U8&m=JpHS
>> pNXFOjqz2mQIFEbLclNsBGFFLrjgWzl5raSOnY0&s=IMfKgW_qvqj1gtwuPAy1AqiaNB5y
>> 0PVUphQdJ3UvryY&e=
>>
>> Neil Armstrong (8):
>> dt-bindings: phy: Add Amlogic G12A USB2 PHY Bindings
>> dt-bindings: phy: Add Amlogic G12A USB3+PCIE Combo PHY Bindings
>> dt-bindings: usb: dwc2: Add Amlogic G12A DWC2 Compatible
>> dt-bindings: usb: dwc3: Add Amlogic G12A DWC3 Glue Bindings
>> phy: amlogic: add Amlogic G12A USB2 PHY Driver
>> phy: amlogic: Add Amlogic G12A USB3 + PCIE Combo PHY Driver
>> usb: dwc2: Add Amlogic G12A DWC2 Params
>> usb: dwc3: Add Amlogic G12A DWC3 glue
>>
>> .../bindings/phy/meson-g12a-usb2-phy.txt | 22 +
>> .../bindings/phy/meson-g12a-usb3-pcie-phy.txt | 22 +
>> .../devicetree/bindings/usb/amlogic,dwc3.txt | 88 +++
>> .../devicetree/bindings/usb/dwc2.txt | 1 +
>> drivers/phy/amlogic/Kconfig | 22 +
>> drivers/phy/amlogic/Makefile | 2 +
>> drivers/phy/amlogic/phy-meson-g12a-usb2.c | 341 ++++++++++
>> .../phy/amlogic/phy-meson-g12a-usb3-pcie.c | 413 ++++++++++++
>> drivers/usb/dwc2/params.c | 12 +
>> drivers/usb/dwc3/Kconfig | 10 +
>> drivers/usb/dwc3/Makefile | 1 +
>> drivers/usb/dwc3/dwc3-meson-g12a.c | 604 ++++++++++++++++++
>> 12 files changed, 1538 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt
>> create mode 100644
>> Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt
>> create mode 100644 drivers/phy/amlogic/phy-meson-g12a-usb2.c
>> create mode 100644 drivers/phy/amlogic/phy-meson-g12a-usb3-pcie.c
>> create mode 100644 drivers/usb/dwc3/dwc3-meson-g12a.c
>>
>
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