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SubjectRe: WARN_ON_ONCE() hit at kernel/events/core.c:330
On Thu, Apr 04, 2019 at 01:09:09PM +0200, Peter Zijlstra wrote:
> That is not entirely the scenario I talked about, but *groan*.
>
> So what I meant was:
>
> CPU-0 CPU-n
>
> __schedule()
> local_irq_disable()
>
> ...
> deactivate_task(prev);
>
> try_to_wake_up(@p)
> ...
> smp_cond_load_acquire(&p->on_cpu, !VAL);
>
> <PMI>
> ..
> perf_event_disable_inatomic()
> event->pending_disable = 1;
> irq_work_queue() /* self-IPI */
> </PMI>
>
> context_switch()
> prepare_task_switch()
> perf_event_task_sched_out()
> // the above chain that clears pending_disable
>
> finish_task_switch()
> finish_task()
> smp_store_release(prev->on_cpu, 0);
> /* finally.... */
> // take woken
> // context_switch to @p
> finish_lock_switch()
> raw_spin_unlock_irq()
> /* w00t, IRQs enabled, self-IPI time */
> <self-IPI>
> perf_pending_event()
> // event->pending_disable == 0
> </self-IPI>
>
>
> What you're suggesting, is that the time between:
>
> smp_store_release(prev->on_cpu, 0);
>
> and
>
> <self-IPI>
>
> on CPU-0 is sufficient for CPU-n to context switch to the task, enable
> the event there, trigger a PMI that calls perf_event_disable_inatomic()
> _again_ (this would mean irq_work_queue() failing, which we don't check)
> (and schedule out again, although that's not required).
>
> This being virt that might actually be possible if (v)CPU-0 takes a nap
> I suppose.
>
> Let me think about this a little more...

Arghh... s390 doesn't implement arch_irq_work_raise(), which makes it
far far worse.

I have a hack that might've cured it, were it not for that. Let me think
more still..

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