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SubjectRe: [PATCH V2 2/2] perf/x86/intel: Add Tremont core PMU support
On Thu, Apr 11, 2019 at 09:30:10AM -0400, Liang, Kan wrote:

> > I changed that like so:
> >
> > --- a/arch/x86/events/intel/core.c
> > +++ b/arch/x86/events/intel/core.c
> > @@ -3508,7 +3508,7 @@ tnt_get_event_constraints(struct cpu_hw_
> > */
> > if (event->attr.precise_ip == 3) {
> > /* Force instruction:ppp on PMC0 and Fixed counter 0 */
> > - if (EVENT_CONFIG(event->hw.config) == X86_CONFIG(.event=0xc0))
> > + if (constraint_match(&fixed_counter0_constraint, event->hw.config))
>
> Should be
> if (constraint_match(&fixed0_counter0_constraint, event->hw.config))

No, because fixed0_counter0_constraint doesn't set an event.

The logic as I proposed checks if it fits the fixed0 constraint, and if
so, allows f0-c0, otherwise only c0.

> > return &fixed0_counter0_constraint;
> > return &counter0_constraint;
> >

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