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Subject[LINUX PATCH v2 0/3] Add support for Zynq QSPI controller driver
Xilinx Zynq uses a QSPI controller that implements all the functionality
required to support Quad SPI NOR flash devices.
This driver along with the SPI MEM and MTD layer is used to support
flash devices.

The flash device(s) can be connected in three configurations to this
1. Single - One flash device with 1 CS, 1 Clock and 4 IO lines.
2. Dual Parallel - Two flash devices connected with common CS and
separate IO lines (resulting in 8 IO lines).
In this configuration, the controller
a) Duplicates commands, address etc. sent on both sets of 4 IO lines.
b) Stripes data both transmitted and received i.e.
4 bits of data is sent to the first flash and the other 4 bits
to the second flash. Similarly read data is also consolidated.
Due to this, TX and RX data handling in the driver need special
handling for parallel mode.
3. Dual Stacked - Two flash devices connected with separate CS and
4 common IO lines. This is largely similar to single, except for
the slave selection logic.
The above configuration is conveyed to the QSPI driver through a
devicetree property(currently not implemented 2 & 3 mentioned above).

As per Boris suggestion We are currently not targetting for
dual stacked/dual parallel handling. There are changes needed in the
framework to handle this. so this update is only for the Single mode.

Naga Sureshkumar Relli (3):
dt-bindings: spi: Add device tree binding documentation for Zynq QSPI
spi: spi-mem: export spi_mem_default_supports_op()
spi: spi-mem: Add support for Zynq QSPI controller

.../devicetree/bindings/spi/spi-zynq-qspi.txt | 25 +
drivers/spi/Kconfig | 10 +-
drivers/spi/Makefile | 1 +
drivers/spi/spi-mem.c | 4 +-
drivers/spi/spi-zynq-qspi.c | 761 +++++++++++++++++++++
include/linux/spi/spi-mem.h | 3 +
6 files changed, 801 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
create mode 100644 drivers/spi/spi-zynq-qspi.c


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