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SubjectRe: [resend PATCH v1 2/2] clk: mediatek: update clock driver of MT2712
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Quoting Weiyi Lu (2018-12-13 18:04:17)
> According to 3rd ECO design change,
> 1. Add new fixed factor clock of audio.
> 2. Add the parent clocks for audio clock mux.
>
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> ---

Applied to clk-next

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