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SubjectRe: [PATCH 16/35] ARM: davinci: aintc: move timer-specific irq_set_handler() out of irq.c
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On 1/31/19 7:39 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bgolaszewski@baylibre.com>
>
> I've been unable to figure out exactly why, but it seems that the
> IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
> level irq, not edge like all others.
>
> This timer is used by the dsp on dm64* boards only.
>
> Let's move the handler setup out of the aintc driver where it's lived
> since the beginning and into the dm64* SoC-specific files where it
> belongs.
>
> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
> ---
> arch/arm/mach-davinci/dm644x.c | 4 ++++
> arch/arm/mach-davinci/dm646x.c | 4 ++++
> arch/arm/mach-davinci/irq.c | 1 -
> 3 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
> index 24ad7a09aa15..beb97101c881 100644
> --- a/arch/arm/mach-davinci/dm644x.c
> +++ b/arch/arm/mach-davinci/dm644x.c
> @@ -14,6 +14,7 @@
> #include <linux/clkdev.h>
> #include <linux/dmaengine.h>
> #include <linux/init.h>
> +#include <linux/irq.h>
> #include <linux/irqchip/irq-davinci-aintc.h>
> #include <linux/platform_data/edma.h>
> #include <linux/platform_data/gpio-davinci.h>
> @@ -616,6 +617,9 @@ void __init dm644x_init_time(void)
> void __iomem *pll1, *psc;
> struct clk *clk;
>
> + /* Needed by the dsp. */
> + irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);

Does this actually need to be called before the clocks are inited?
If not, it would seem more logical to have this right before
davinci_timer_init().

Also, since the IRQ_TINT1_TINT34 macro is removed later, the comment
could do a better job explaining what it is doing.


> +
> clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
>
> pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K);
> diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
> index ab02cc93813a..70505c92d5fb 100644
> --- a/arch/arm/mach-davinci/dm646x.c
> +++ b/arch/arm/mach-davinci/dm646x.c
> @@ -15,6 +15,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/dmaengine.h>
> #include <linux/init.h>
> +#include <linux/irq.h>
> #include <linux/irqchip/irq-davinci-aintc.h>
> #include <linux/platform_data/edma.h>
> #include <linux/platform_data/gpio-davinci.h>
> @@ -599,6 +600,9 @@ void __init dm646x_init_time(unsigned long ref_clk_rate,
> void __iomem *pll1, *psc;
> struct clk *clk;
>
> + /* Needed by the dsp. */
> + irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);

same here.

> +
> clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
> clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
>
> diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
> index d67f443a471d..2e114ad83adc 100644
> --- a/arch/arm/mach-davinci/irq.c
> +++ b/arch/arm/mach-davinci/irq.c
> @@ -142,6 +142,5 @@ void __init davinci_aintc_init(const struct davinci_aintc_config *config)
> davinci_aintc_setup_gc(davinci_aintc_base + reg_off,
> irq_base + irq_off, 32);
>
> - irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
> set_handle_irq(davinci_aintc_handle_irq);
> }
>

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