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SubjectRe: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC
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Hi Sylwester,

On 2/1/19 3:19 PM, Sylwester Nawrocki wrote:
> On 2/1/19 14:56, Lukasz Luba wrote:
>>> Exynos5422 used the same PLL table for apll, kpll, bpll and so on.
>>> You don't need to make the separate pll table. Just add new entries
>>> to exynos5420_pll2550x_24mhz_tbl table.
>> OK, I will extend the exynos5420_pll2550x_24mhz_tbl table.
>>
>> In v4 patch set, it will be fixed.
>
> I would prefer to keep the rate table separate for BPLL, until correctness
> of new rates introduced in the patch and their applicability to the other PLLs
> is confirmed by the hardware team and verified in tests.
Good point, I share the same opinion. So, this new table for BPLL will stay.
Do you agree Chanwoo?
The BPLL is only used only by DMC.

Regards,
Lukasz
>

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