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Subject[PATCH 2/7] dt-bindings: PCI: cadence: Add binding to specify max virtual functions
Date
Add binding to specify maximum number of virtual functions that can be
associated with each physical function.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
.../devicetree/bindings/pci/cdns,cdns-pcie-ep.txt | 2 ++
.../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 8 ++++++++
2 files changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
index 4a0475e2ba7e..432578202733 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
@@ -9,6 +9,8 @@ Required properties:

Optional properties:
- max-functions: Maximum number of functions that can be configured (default 1).
+- max-virtual-functions: Maximum number of virtual functions that can be
+ associated with each physical function.
- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more
than one in the list. If only one PHY listed it must manage all lanes.
- phy-names: List of names to identify the PHY.
diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
index 4621c62016c7..1d4964ba494f 100644
--- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
@@ -61,6 +61,12 @@ properties:
minimum: 1
maximum: 6

+ max-virtual-functions:
+ minItems: 1
+ maxItems: 6
+ description: As defined in
+ Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
+
dma-coherent:
description: Indicates that the PCIe IP block can ensure the coherency

@@ -85,6 +91,7 @@ required:
- cdns,max-outbound-regions
- dma-coherent
- max-functions
+ - max-virtual-functions
- phys
- phy-names

@@ -107,6 +114,7 @@ examples:
clock-names = "fck";
cdns,max-outbound-regions = <16>;
max-functions = /bits/ 8 <6>;
+ max-virtual-functions = /bits/ 16 <4 4 4 4 0 0>;
dma-coherent;
phys = <&serdes0_pcie_link>;
phy-names = "pcie_phy";
--
2.17.1
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