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SubjectRe: [PATCH v2 1/2] clk: intel: Add CGU clock driver for a new SoC
On Fri, Dec 20, 2019 at 11:31:07AM +0800, Rahul Tanwar wrote:
> From: rtanwar <rahul.tanwar@intel.com>
>
> Clock Generation Unit(CGU) is a new clock controller IP of a forthcoming
> Intel network processor SoC. It provides programming interfaces to control
> & configure all CPU & peripheral clocks. Add common clock framework based
> clock controller driver for CGU.

...

> drivers/clk/Kconfig | 8 +

This should be in x86 folder and you perhaps need to add
source "drivers/clk/x86/Kconfig" here.

Also drivers/clk/Makefile should be updated accordingly.

...

> +static int lgm_pll_wait_for_lock(struct lgm_clk_pll *pll)
> +{
> + int max_loop_cnt = 100;
> + unsigned long flags;
> + unsigned int val;
> +
> + while (max_loop_cnt > 0) {
> + raw_spin_lock_irqsave(&pll->lock, flags);
> + val = lgm_get_clk_val(pll->membase, pll->reg, 0, 1);
> + raw_spin_unlock_irqrestore(&pll->lock, flags);
> +
> + if (val)
> + return 0;
> +
> + udelay(1);
> + max_loop_cnt--;
> + }

Looks like a repetition of iopoll.h.
Even without that the waiting loops like this more natural in a form of

unsigned int count = ...;
...
do {
...
} while (--count);

> +
> + return -EIO;
> +}

I think I told you that during internal review.

...

> +void lgm_set_clk_val(void *membase, u32 reg,
> + u8 shift, u8 width, u32 set_val)

There is plenty of space, and to be precise it would take exactly 80, on the
previous line.

> +{
> + u32 mask = (GENMASK(width - 1, 0) << shift);
> + u32 regval;
> +
> + regval = readl(membase + reg);
> + regval = (regval & ~mask) | ((set_val << shift) & mask);
> + writel(regval, membase + reg);
> +}

...

> +void lgm_clk_add_lookup(struct lgm_clk_provider *ctx,
> + struct clk_hw *hw, unsigned int id)

Ditto.

...

> + if (gate->flags & GATE_CLK_HW)
> + reg = GATE_HW_REG_EN(gate->reg);
> + else if (gate->flags & GATE_CLK_SW)
> + reg = gate->reg;
> + else {
> + dev_err(gate->dev, "%s has unsupported flags 0x%lx\n",
> + clk_hw_get_name(hw), gate->flags);
> + return 0;
> + }

Missed curly braces in first two conditionals.

...

> + if (gate->flags & GATE_CLK_HW)
> + reg = GATE_HW_REG_STAT(gate->reg);
> + else if (gate->flags & GATE_CLK_SW)
> + reg = gate->reg;
> + else {
> + dev_err(gate->dev, "%s has unsupported flags 0x%lx\n",
> + clk_hw_get_name(hw), gate->flags);
> + return 0;
> + }

Ditto.

--
With Best Regards,
Andy Shevchenko


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