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SubjectRe: [v8 PATCH] PM / devfreq: Add dynamic scaling for imx8m ddr controller
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On 12/20/19 8:09 AM, Chanwoo Choi wrote:
> From: Leonard Crestez <leonard.crestez@nxp.com>
>
> Add driver for dynamic scaling the DDR Controller on imx8m chips. Actual
> frequency switching is implemented inside TF-A, this driver wraps the
> SMC calls and synchronizes the clk tree.
>
> The DRAM clocks on imx8m have the following structure (abridged):
>
> +----------+ |\ +------+
> | dram_pll |-------|M| dram_core | |
> +----------+ |U|---------->| D |
> /--|X| | D |
> dram_alt_root | |/ | R |
> | | C |
> +---------+ | |
> |FIX DIV/4| | |
> +---------+ | |
> composite: | | |
> +----------+ | | |
> | dram_alt |----/ | |
> +----------+ | |
> | dram_apb |-------------------->| |
> +----------+ +------+
>
> The dram_pll is used for higher rates and dram_alt is used for lower
> rates. The dram_alt and dram_apb clocks are "imx composite" and their
> parent can also be modified.
>
> This driver will prepare/enable the new parents ahead of switching (so
> that the expected roots are enabled) and afterwards it will call
> clk_set_parent to ensure the parents in clock framework are up-to-date.
>
> The driver relies on dram_pll dram_alt and dram_apb being marked with
> CLK_GET_RATE_NOCACHE for rate updates.
>
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
> [cw00.choi: Edit the COMPILE_TEST module dependency in Kconfig]
> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
> ---
> Changes from v7:
> - Squash patch[1] to this patch
> [1] https://patchwork.kernel.org/patch/11303869/
> - [PATCH] PM / devfreq: imx8m-ddrc: Fix argument swap in error print

Applied it.

(snip)


--
Best Regards,
Chanwoo Choi
Samsung Electronics

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