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SubjectRe: [GIT PULL] timer fixes
On Tue, Dec 17, 2019 at 12:43:46PM -0800, Linus Torvalds wrote:
> On Tue, Dec 17, 2019 at 12:35 PM Peter Zijlstra <> wrote:
> >
> > Pray.. the TSC MSR is still writable from SMM, so BIOS monkeys could
> > still do what they've been doing for decades.
> Sure. And the HPET is unreliable, so the checking causes issues.
> Which one should we worry about?

I'm just waiting for the system that messes up the TSC and doesn't have
HPET/PIT _at_all_ :-/

But yes, I get your point.

> > Also, what consititutes a 'modern' CPU?
> I think anything that has TSC_STABLE set should likely be considered
> more reliable than HPET.
> Or whatever the bit is called. The "doesn't stop in idle" thing.

The doesn't stop on idle thing is CONSTANT_TSC, and that has been set
since Nehalem, and there are a metric ton of systems still failing due
to the described SMM 'feature'.

Perhaps we can go with TSC_KNOWN_FREQ, which relies on CPUID.15h to tell
us the actual TSC frequency, but I'm not sure all modern systems
actually fill out that leaf :/

The systems that completely got rid of the HPET/PIT pretty much must
fill that out, otherwise there's just no way we can recover the TSC

I'm going to have to wait for Thomas to chime in though; I only
occasionally poke at this stuff ;-)

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