Messages in this thread |  | | Subject | Re: [PATCH 05/17] asm-generic/tlb: Rename HAVE_RCU_TABLE_NO_INVALIDATE | From | "Aneesh Kumar K.V" <> | Date | Mon, 16 Dec 2019 19:24:24 +0530 |
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On 12/16/19 7:10 PM, Aneesh Kumar K.V wrote: > On 12/16/19 6:50 PM, Peter Zijlstra wrote: >> On Mon, Dec 16, 2019 at 06:43:53PM +0530, Aneesh Kumar K.V wrote: >>> On 12/16/19 6:07 PM, Peter Zijlstra wrote: >> >>>> I'm confused, are you saing you're happy to have PowerPC eat the extra >>>> TLB invalidates? I thought you cared about PPC performance :-) >>>> >>>> >>> >>> Instead can we do >>> >>> static inline void tlb_table_invalidate(struct mmu_gather *tlb) >>> { >>> #ifndef CONFIG_MMU_GATHER_RCU_TABLE_FREE >>> * Invalidate page-table caches used by hardware walkers. Then we >>> still >>> * need to RCU-sched wait while freeing the pages because software >>> * walkers can still be in-flight. >>> */ >>> tlb_flush_mmu_tlbonly(tlb); >>> #endif >>> } >> >> How does that not break ARM/ARM64/s390 and x86 ? >> > > Hmm I missed that usage of RCU_TABLE_NO_INVALIDATE. > > Ok I guess we need to revert this change that went upstream this merge > window then > > commit 52162ec784fa05f3a4b1d8e84421279998be3773 > Author: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> > Date: Thu Oct 24 13:28:00 2019 +0530 > > powerpc/mm/book3s64/radix: Use freed_tables instead of need_flush_all > > > > I will review the change closely.
So __p*_free_tlb() routines on ppc64 just mark that we need a page walk cache flush and the actual flush in done in tlb_flush_mmu. As per
d86564a2f085b79ec046a5cba90188e61235280 (mm/tlb, x86/mm: Support invalidating TLB caches for RCU_TABLE_FREE ) that is not sufficient?
-aneesh
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