Messages in this thread |  | | From | Ulf Hansson <> | Date | Mon, 16 Dec 2019 13:09:03 +0100 | Subject | Re: [PATCH] mmc: sdhci-msm: Correct the offset and value for DDR_CONFIG register |
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On Wed, 11 Dec 2019 at 11:22, Veerabhadrarao Badiganti <vbadigan@codeaurora.org> wrote: > > > On 12/10/2019 3:21 PM, Ulf Hansson wrote: > > On Tue, 26 Nov 2019 at 11:19, Veerabhadrarao Badiganti > > <vbadigan@codeaurora.org> wrote: > >> The DDR_CONFIG register offset got updated after a specific > >> minor version of sdcc V4. This offset change has not been properly > >> taken care of while updating register changes for sdcc V5. > >> > >> Correcting proper offset for this register. > >> Also updating this register value to reflect the recommended RCLK > >> delay. > >> > >> Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org> > > I have applied this for fixes, however it seems like this should also > > be tagged for stable, right? > > Thank you. Yes, I agree. > > > > > Is there a specific commit this fixes or should we just find the > > version it applies to? > > It fixes the bug introduced by commit: > > f153588 (mmc: sdhci-msm: Define new Register address map)
Great, thanks added a fixes/stable tag.
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Kind regards Uffe
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