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SubjectRe: [v11 2/2] clk: ls1028a: Add clock driver for Display output interface
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Quoting Michael Walle (2019-12-12 16:06:16)
> Am 12. Dezember 2019 23:18:16 MEZ schrieb Stephen Boyd <sboyd@kernel.org>:
> >Quoting Wen He (2019-12-04 23:26:53)
> >> Add clock driver for QorIQ LS1028A Display output interfaces(LCD,
> >DPHY),
> >> as implemented in TSMC CLN28HPM PLL, this PLL supports the
> >programmable
> >> integer division and range of the display output pixel clock's
> >27-594MHz.
> >>
> >> Signed-off-by: Wen He <wen.he_1@nxp.com>
> >> Signed-off-by: Michael Walle <michael@walle.cc>
> >
> >Is Michael the author? SoB chain is backwards here.
>
> the original driver was from Wen. I've just supplied some code and
> the vco frequency stuff. so its basically a sob of us both.
>
> -michael

Ok. That's a Co-developed-by: tag then. Thanks for letting us know.

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