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SubjectRe: [PATCH v17 4/6] soc: mediatek: cmdq: add polling function
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Hi Jassi,

On 21/11/2019 02:54, Bibby Hsieh wrote:
> add polling function in cmdq helper functions
>
> Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-cmdq-helper.c | 36 ++++++++++++++++++++++++
> include/linux/mailbox/mtk-cmdq-mailbox.h | 1 +
> include/linux/soc/mediatek/mtk-cmdq.h | 32 +++++++++++++++++++++
> 3 files changed, 69 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
> index 11bfcc150ebd..9094fda5a8fe 100644
> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> @@ -10,6 +10,7 @@
> #include <linux/soc/mediatek/mtk-cmdq.h>
>
> #define CMDQ_WRITE_ENABLE_MASK BIT(0)
> +#define CMDQ_POLL_ENABLE_MASK BIT(0)
> #define CMDQ_EOC_IRQ_EN BIT(0)
> #define CMDQ_EOC_CMD ((u64)((CMDQ_CODE_EOC << CMDQ_OP_CODE_SHIFT)) \
> << 32 | CMDQ_EOC_IRQ_EN)
> @@ -214,6 +215,41 @@ int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event)
> }
> EXPORT_SYMBOL(cmdq_pkt_clear_event);
>
> +int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + inst.op = CMDQ_CODE_POLL;
> + inst.value = value;
> + inst.offset = offset;
> + inst.subsys = subsys;
> + err = cmdq_pkt_append_command(pkt, inst);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(cmdq_pkt_poll);
> +
> +int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value, u32 mask)
> +{
> + struct cmdq_instruction inst = { {0} };
> + int err;
> +
> + inst.op = CMDQ_CODE_MASK;
> + inst.mask = ~mask;
> + err = cmdq_pkt_append_command(pkt, inst);
> + if (err < 0)
> + return err;
> +
> + offset = offset | CMDQ_POLL_ENABLE_MASK;
> + err = cmdq_pkt_poll(pkt, subsys, offset, value);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(cmdq_pkt_poll_mask);
> +
> static int cmdq_pkt_finalize(struct cmdq_pkt *pkt)
> {
> struct cmdq_instruction inst = { {0} };
> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
> index 678760548791..a4dc45fbec0a 100644
> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
> @@ -55,6 +55,7 @@
> enum cmdq_code {
> CMDQ_CODE_MASK = 0x02,
> CMDQ_CODE_WRITE = 0x04,
> + CMDQ_CODE_POLL = 0x08,

I understand that this is a minor change in the code, so I queued this in my
branch v5.5-next/soc for now.
Let me know if you need a stable branch with the commit to merge it into your tree.

Hope there is no problem with that.

Regards,
Matthias

> CMDQ_CODE_JUMP = 0x10,
> CMDQ_CODE_WFE = 0x20,
> CMDQ_CODE_EOC = 0x40,
> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
> index 9618debb9ceb..92bd5b5c6341 100644
> --- a/include/linux/soc/mediatek/mtk-cmdq.h
> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
> @@ -99,6 +99,38 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event);
> */
> int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
>
> +/**
> + * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
> + * execute an instruction that wait for a specified
> + * hardware register to check for the value w/o mask.
> + * All GCE hardware threads will be blocked by this
> + * instruction.
> + * @pkt: the CMDQ packet
> + * @subsys: the CMDQ sub system code
> + * @offset: register offset from CMDQ sub system
> + * @value: the specified target register value
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value);
> +
> +/**
> + * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to
> + * execute an instruction that wait for a specified
> + * hardware register to check for the value w/ mask.
> + * All GCE hardware threads will be blocked by this
> + * instruction.
> + * @pkt: the CMDQ packet
> + * @subsys: the CMDQ sub system code
> + * @offset: register offset from CMDQ sub system
> + * @value: the specified target register value
> + * @mask: the specified target register mask
> + *
> + * Return: 0 for success; else the error code is returned
> + */
> +int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
> + u16 offset, u32 value, u32 mask);
> /**
> * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
> * packet and call back at the end of done packet
>

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