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Subject[PATCH v2 5/5] clk: Ingenic: Remove unnecessary spinlock when reading registers.
Date
It is not necessary to use spinlock when reading registers,
so remove it from cgu.c.

Suggested-by: Paul Cercueil <paul@crapouillou.net>
Suggested-by: Paul Burton <paulburton@kernel.org>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---

Notes:
v2:
New Patch.

drivers/clk/ingenic/cgu.c | 8 --------
1 file changed, 8 deletions(-)

diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c
index ae1ddcb..3c95451 100644
--- a/drivers/clk/ingenic/cgu.c
+++ b/drivers/clk/ingenic/cgu.c
@@ -76,16 +76,13 @@ ingenic_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
const struct ingenic_cgu_pll_info *pll_info;
unsigned m, n, od_enc, od;
bool bypass;
- unsigned long flags;
u32 ctl;

clk_info = &cgu->clock_info[ingenic_clk->idx];
BUG_ON(clk_info->type != CGU_CLK_PLL);
pll_info = &clk_info->pll;

- spin_lock_irqsave(&cgu->lock, flags);
ctl = readl(cgu->base + pll_info->pll_reg);
- spin_unlock_irqrestore(&cgu->lock, flags);

m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0);
m += pll_info->m_offset;
@@ -94,9 +91,7 @@ ingenic_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
od_enc = ctl >> pll_info->od_shift;
od_enc &= GENMASK(pll_info->od_bits - 1, 0);

- spin_lock_irqsave(&cgu->lock, flags);
ctl = readl(cgu->base + pll_info->bypass_reg);
- spin_unlock_irqrestore(&cgu->lock, flags);

bypass = !pll_info->no_bypass_bit &&
!!(ctl & BIT(pll_info->bypass_bit));
@@ -269,12 +264,9 @@ static int ingenic_pll_is_enabled(struct clk_hw *hw)
struct ingenic_cgu *cgu = ingenic_clk->cgu;
const struct ingenic_cgu_clk_info *clk_info = to_clk_info(ingenic_clk);
const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll;
- unsigned long flags;
u32 ctl;

- spin_lock_irqsave(&cgu->lock, flags);
ctl = readl(cgu->base + pll_info->pll_reg);
- spin_unlock_irqrestore(&cgu->lock, flags);

return !!(ctl & BIT(pll_info->enable_bit));
}
--
2.7.4
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