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Subject[PATCH v4 07/17] firmware: qcom_scm-64: Move SMC register filling to qcom_scm_call_smccc
Date
qcom_scm_call_smccc should be responsible for converting qcom_scm_desc
into arguments for smc call. Consolidate the dispersed logic to convert
qcom_scm_desc into smc arguments inside qcom_scm_call_smccc.

Signed-off-by: Elliot Berman <eberman@codeaurora.org>
---
drivers/firmware/qcom_scm-64.c | 54 ++++++++++++++++++++++++++----------------
1 file changed, 34 insertions(+), 20 deletions(-)

diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index e0e6530..3ae171a 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -62,6 +62,14 @@ struct qcom_scm_res {
u64 result[MAX_QCOM_SCM_RETS];
};

+/**
+ * struct arm_smccc_args
+ * @args: The array of values used in registers in smc instruction
+ */
+struct arm_smccc_args {
+ unsigned long args[8];
+};
+
static u64 qcom_smccc_convention = -1;
static DEFINE_MUTEX(qcom_scm_lock);

@@ -71,46 +79,42 @@ static DEFINE_MUTEX(qcom_scm_lock);
#define SCM_SMC_N_REG_ARGS 4
#define SCM_SMC_FIRST_EXT_IDX (SCM_SMC_N_REG_ARGS - 1)
#define SCM_SMC_N_EXT_ARGS (MAX_QCOM_SCM_ARGS - SCM_SMC_N_REG_ARGS + 1)
+#define SCM_SMC_FIRST_REG_IDX 2
+#define SCM_SMC_LAST_REG_IDX (SCM_SMC_FIRST_REG_IDX + SCM_SMC_N_REG_ARGS - 1)

-static void __scm_smc_do_quirk(const struct qcom_scm_desc *desc,
- struct arm_smccc_res *res, u64 x5, u32 type)
+static void __scm_smc_do_quirk(const struct arm_smccc_args *smc,
+ struct arm_smccc_res *res)
{
- u64 cmd;
+ unsigned long a0 = smc->args[0];
struct arm_smccc_quirk quirk = { .id = ARM_SMCCC_QUIRK_QCOM_A6 };

- cmd = ARM_SMCCC_CALL_VAL(
- type,
- qcom_smccc_convention,
- desc->owner,
- SCM_SMC_FNID(desc->svc, desc->cmd));
-
quirk.state.a6 = 0;

do {
- arm_smccc_smc_quirk(cmd, desc->arginfo, desc->args[0],
- desc->args[1], desc->args[2], x5,
- quirk.state.a6, 0, res, &quirk);
+ arm_smccc_smc_quirk(a0, smc->args[1], smc->args[2],
+ smc->args[3], smc->args[4], smc->args[5],
+ quirk.state.a6, smc->args[7], res, &quirk);

if (res->a0 == QCOM_SCM_INTERRUPTED)
- cmd = res->a0;
+ a0 = res->a0;

} while (res->a0 == QCOM_SCM_INTERRUPTED);
}

-static void __scm_smc_do(const struct qcom_scm_desc *desc,
- struct arm_smccc_res *res, u64 x5, bool atomic)
+static void __scm_smc_do(const struct arm_smccc_args *smc,
+ struct arm_smccc_res *res, bool atomic)
{
int retry_count = 0;

if (atomic) {
- __scm_smc_do_quirk(desc, res, x5, ARM_SMCCC_FAST_CALL);
+ __scm_smc_do_quirk(smc, res);
return;
}

do {
mutex_lock(&qcom_scm_lock);

- __scm_smc_do_quirk(desc, res, x5, ARM_SMCCC_STD_CALL);
+ __scm_smc_do_quirk(smc, res);

mutex_unlock(&qcom_scm_lock);

@@ -127,12 +131,22 @@ static int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc,
{
int arglen = desc->arginfo & 0xf;
int i;
- u64 x5 = desc->args[SCM_SMC_FIRST_EXT_IDX];
dma_addr_t args_phys = 0;
void *args_virt = NULL;
size_t alloc_len;
gfp_t flag = atomic ? GFP_ATOMIC : GFP_KERNEL;
+ u32 smccc_call_type = atomic ? ARM_SMCCC_FAST_CALL : ARM_SMCCC_STD_CALL;
struct arm_smccc_res smc_res;
+ struct arm_smccc_args smc = {0};
+
+ smc.args[0] = ARM_SMCCC_CALL_VAL(
+ smccc_call_type,
+ qcom_smccc_convention,
+ desc->owner,
+ SCM_SMC_FNID(desc->svc, desc->cmd));
+ smc.args[1] = desc->arginfo;
+ for (i = 0; i < SCM_SMC_N_REG_ARGS; i++)
+ smc.args[i + SCM_SMC_FIRST_REG_IDX] = desc->args[i];

if (unlikely(arglen > SCM_SMC_N_REG_ARGS)) {
alloc_len = SCM_SMC_N_EXT_ARGS * sizeof(u64);
@@ -163,10 +177,10 @@ static int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc,
return -ENOMEM;
}

- x5 = args_phys;
+ smc.args[SCM_SMC_LAST_REG_IDX] = args_phys;
}

- __scm_smc_do(desc, &smc_res, x5, atomic);
+ __scm_smc_do(&smc, &smc_res, atomic);

if (args_virt) {
dma_unmap_single(dev, args_phys, alloc_len, DMA_TO_DEVICE);
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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