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SubjectRe: imx6 and keystone PCIe abort handling
On Thu, Dec 12, 2019 at 06:32:36PM -0600, Bjorn Helgaas wrote:
> Hi folks,
>
> Why are ks_pcie_fault() and imx6q_pcie_abort_handler() different? I
> think they're doing the same thing, and the "instr & 0x0e100090" part
> is the same, but only imx6 has the "instr & 0x0c100000" part. And the
> return values are different in some cases.

Here's the opcodes for the three different types of loads that would
be interesting.

0: e5910000 ldr r0, [r1] ; 32-bit
4: e5d10000 ldrb r0, [r1] ; 8-bit
8: e1d100b0 ldrh r0, [r1] ; 16-bit

So, (instr & 0x0e100090) == 0x00100090 is trie for the ldrh case.
(instr & 0x0c100000) == 0x04100000 is true for the ldr and ldrb case.

So, the keystone version only traps ldrh instructions, whereas the
imx6 traps them all.

> Could/should these be shared somehow? They're both under #ifdef
> CONFIG_ARM, so maybe it could be provided by arch/arm?
>
> static int ks_pcie_fault(unsigned long addr, unsigned int fsr,
> struct pt_regs *regs)
> {
> unsigned long instr = *(unsigned long *) instruction_pointer(regs);
>
> if ((instr & 0x0e100090) == 0x00100090) {
> int reg = (instr >> 12) & 15;
>
> regs->uregs[reg] = -1;
> regs->ARM_pc += 4;
> }
>
> return 0;
> }
>
> static int imx6q_pcie_abort_handler(unsigned long addr,
> unsigned int fsr, struct pt_regs *regs)
> {
> unsigned long pc = instruction_pointer(regs);
> unsigned long instr = *(unsigned long *)pc;
> int reg = (instr >> 12) & 15;
>
> /*
> * If the instruction being executed was a read,
> * make it look like it read all-ones.
> */
> if ((instr & 0x0c100000) == 0x04100000) {
> unsigned long val;
>
> if (instr & 0x00400000)
> val = 255;
> else
> val = -1;
>
> regs->uregs[reg] = val;
> regs->ARM_pc += 4;
> return 0;
> }
>
> if ((instr & 0x0e100090) == 0x00100090) {
> regs->uregs[reg] = -1;
> regs->ARM_pc += 4;
> return 0;
> }
>
> return 1;
> }
>
>

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