[lkml]   [2019]   [Dec]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
Patch in this message
Subject[PATCH v2 1/4] dt-bindings: nvmem: new optional property write-protect-gpios
Several memories have a write-protect pin, that when pulled high, it
blocks the write operation.

On some boards, this pin is connected to a GPIO and pulled high by
default, which forces the user to manually change its state before

Instead of modifying all the memory drivers to check this pin, make
the NVMEM subsystem check if the write-protect GPIO being passed
through the nvmem_config or defined in the device tree and pull it
low whenever writing to the memory.

Add a new optional property to the device tree binding document, which
allows to specify the GPIO line to which the write-protect pin is

Signed-off-by: Khouloud Touil <>
Documentation/devicetree/bindings/nvmem/nvmem.yaml | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
index 1c75a059206c..ea012b2f2e77 100644
--- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
+++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
@@ -34,6 +34,14 @@ properties:
Mark the provider as read only.

+ wp-gpios:
+ description:
+ GPIO to which the write-protect pin of the chip is connected.
+ The write-protect GPIO is asserted, when it's driven high
+ (logical '1') to block the write operation. It's deasserted,
+ when it's driven low (logical '0') to allow writing.
+ maxItems: 1
type: object
@@ -66,6 +74,7 @@ examples:
qfprom: eeprom@700000 {
#address-cells = <1>;
#size-cells = <1>;
+ wp-gpios = <&gpio1 3 0>;

/* ... */

 \ /
  Last update: 2019-12-10 16:43    [W:0.056 / U:3.084 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site