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Subject[PATCH RFC 3/8] dt-bindings: display: add Unisoc's dpu bindings
Date
From: Kevin Tang <kevin.tang@unisoc.com>

DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
which transfers the image data from a video memory buffer to an internal
LCD interface.

Cc: Orson Zhai <orsonzhai@gmail.com>
Cc: Baolin Wang <baolin.wang@linaro.org>
Cc: Chunyan Zhang <zhang.lyra@gmail.com>
Signed-off-by: Kevin Tang <kevin.tang@unisoc.com>
---
.../devicetree/bindings/display/sprd/dpu.txt | 55 ++++++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/sprd/dpu.txt

diff --git a/Documentation/devicetree/bindings/display/sprd/dpu.txt b/Documentation/devicetree/bindings/display/sprd/dpu.txt
new file mode 100644
index 0000000..25cbf8e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/sprd/dpu.txt
@@ -0,0 +1,55 @@
+Unisoc SoC Display Processor Unit (DPU)
+============================================================================
+
+DPU (Display Processor Unit) is the Display Controller for the Unisoc SoCs
+which transfers the image data from a video memory buffer to an internal
+LCD interface.
+
+Required properties:
+ - compatible: value should be "sprd,display-processor";
+ - reg: physical base address and length of the DPU registers set.
+ - interrupts: the interrupt signal from DPU.
+ - clocks: must include clock specifiers corresponding to entries in the
+ clock-names property.
+ - clock-names: list of clock names sorted in the same order as the clocks
+ property.
+ - dma-coherent: with this property, the dpu driver can allocate large and
+ continuous memorys.
+ - port: a port node with endpoint definitions as defined in document [1].
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt.
+
+Optional Properties:
+ - iommus: a phandle to DPU iommu node.
+ - power-domains: a phandle to DPU power domain node.
+
+
+Example:
+
+SoC specific DT entry:
+
+ dpu: dpu@63000000 {
+ compatible = "sprd,display-processor";
+ reg = <0x0 0x63000000 0x0 0x1000>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "clk_src_128m",
+ "clk_src_153m6",
+ "clk_src_384m",
+ "clk_dpu_core",
+ "clk_dpu_dpi",
+ "clk_aon_apb_disp_eb";
+
+ clocks = <&clk_twpll_128m>,
+ <&clk_twpll_153m6>,
+ <&clk_twpll_384m>,
+ <&clk_dpu>,
+ <&clk_dpu_dpi>,
+ <&clk_aon_top_gates 2>;
+
+ dma-coherent;
+ dpu_port: port {
+ dpu_out: endpoint {
+ remote-endpoint = <&dsi_in>;
+ };
+ };
+ };
\ No newline at end of file
--
2.7.4
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