[lkml]   [2019]   [Nov]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH v2] clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation
Quoting Dmitry Osipenko (2019-11-14 04:10:51)
> >
> > It's not so much that I missed to pick this up. It's just that it didn't
> > make it in time. This was posted just a couple of days before v5.4-rc6
> > and I had already finalized the branches at that point. Given that this
> > doesn't fix any actual issues it didn't seem worth to force it in at
> > that point.
> >
> > That said, I don't have any objections if Stephen wants to pick this up
> > on top of the pull requests.
> Thanks!

I'm fine to wait for it to come through a pull request next time. I just
wanted to know what to do with this patch in my queue.

 \ /
  Last update: 2019-11-15 22:37    [W:0.061 / U:2.568 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site