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Subject[PATCH 2/2] clk: imx: pll14xx: use readl to force write completed
Date
From: Peng Fan <peng.fan@nxp.com>

To ensure writes to clock registers have properly completed,
add a readl after writel_relaxed. Then we could make sure
when udelay, write has been completed.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Will Deacon <will@kernel.org>
---
drivers/clk/imx/clk-pll14xx.c | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index e34813904023..2bbcfbf8081a 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -205,6 +205,12 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate,
(rate->sdiv << SDIV_SHIFT);
writel_relaxed(div_val, pll->base + 0x4);

+ /*
+ * readl will force write completed. There is a udelay below,
+ * we need make sure before udelay, write has been completed
+ */
+ readl(pll->base + 0x4);
+
/*
* According to SPEC, t3 - t2 need to be greater than
* 1us and 1/FREF, respectively.
--
2.16.4
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