lkml.org 
[lkml]   [2019]   [Oct]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH 10/16] x86/cpu: Detect VMX features on Intel, Centaur and Zhaoxin CPUs
From
Date
On 04/10/19 23:56, Sean Christopherson wrote:
> + /*
> + * The high bits contain the allowed-1 settings, i.e. features that can
> + * be turned on. The low bits contain the allowed-0 settings, i.e.
> + * features that can be turned off. Ignore the allowed-0 settings,
> + * if a feature can be turned on then it's supported.
> + */
> + rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);

For QEMU, we're defining a feature as supported if a feature can be
turned both on and off. Since msr_low and msr_high can be defined
respectively as must-be-one and can-be-one, the features become
"msr_high & ~msr_low".

Also, shouldn't this use the "true" feature availability MSRs if available?

Paolo

\
 
 \ /
  Last update: 2019-10-07 19:12    [W:0.149 / U:9.308 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site